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ADuM4135 going into error unexpectedly


I got a problem with some ADuM4135s. I'm using them together with an additional booster stage (MOS input, so the ADUM is really only used for isolation + desat). The problem occurs in only some identical setups when the respective converter's transferred power/current exceeds a certain threshold. Unfortunately, I tied together all FAULT and READY pins so I can't tell which pin is signalling the error. The basic data is:

- VDD1 = 5V

- VDD2 = 12.7V, bootstrapped --> highside about 12V

- VSS2 connected to GND2

- GATE_SENSE tied to VSS2

- VOUT_ON connected directly to VOUT_OFF and the booster's input pin (~13cm trace length, can't be changed unfortunately).

I tried out the following things:

- measured the error output to see if it was some noise my control was picking up. No noise, it's really going low like if it was pulled low.

- monitored DESAT voltage --> not surpassing 6V, problem gone while differential probe was attached

- removed the measuring equipment and soldered pins 9, 10, 11 together directly at the ICs --> DESAT should be disabled, problem was back however

- replaced the original single 22u/25V X5R VDD2 capacitor by 100n (at the bottom) + the original 22u piggy-backed onto the 100n almost directly between pins 13 and 11 (~3mm trace length each side), problem persisted

- measured VDD2 using a differential probe. Apart from some high-frequency ringing I would attribute to the measurement setup, the voltage never seems to go below 11.9 V --> well away from 11.1 V which is given as the negative-going threshold in the datasheet for UVLO

- increased VDD2 by 0.5V. No change in behavior.

One very strange thing is that when I had the differential probe attached to VDD2 and/or DESAT, the problem disappeared. I thought maybe the parasitic capacitance of my probe was helping so I soldered a small capacitor (47p) between the highside-VSS and the lowside-VSS (directly adjacent on my board). Didn't help.

Also, the problem did not return when I removed the probe but left the short (~4 cm) cables used to connect the probes before. The cables were soldered to the CBlank capacitor and the VDD2 capacitor. I started fiddling with the cables and found out that two cables on each high side ADuM sufficed to make my problems go away. The cables needed to be bent over the IC in roughly its center. So I thought it might be some kind of electrical field problem which got "shielded" by the short cables. I then cut out a copper foil to match the IC's size plus two "pins" and used those "pins" to solder the foil to the IC pins 16/15 and 9. I thought that this would be a much better solution than the cables however the problem was back! Both dv/dt and magnetic field at the ICs' place shouldn't be greater than 1/50 of the critical values given in the datasheet if calculated by the di/dt in the load and the dv/dt using the output stage's capacitance and the load current.

I'm really running out of ideas here and would be very grateful for any suggestions what else to try out.

Best regards


  • Hello Lennart,

    I'm sorry the ADuM4135 is being fickle for you. The one thing that sticks out to me right now is that voltage you are running on VDD2. On the booststrapped side, you say it has 12 V. Is this the absolute minimum the part sees, or is is possible there are short excursions from this?

    You have done a lot of good testing so far. The information that is of most interest so far are:

    "- removed the measuring equipment and soldered pins 9, 10, 11 together directly at the ICs --> DESAT should be disabled, problem was back however"

       This means it is probably not tied to the actual DESAT detection, and is some kind of noise induction.

    "- increased VDD2 by 0.5V. No change in behavior."

       Did this not change the amount of power the system could run at in any amount?

    The next test I would try if it is possible is to operate the system with a higher VDD2 voltage (higher than the 0.5 V extra tested already). If this makes the system able to operate at higher powers without a false DESAT signal, we can narrow the issue down.


  • Dear RSchnell,

    thanks a lot for the quick reply. Unfortunately I cannot increase the operating voltage any further due to some overvoltage protection that is hard to disable on the board. Also, I did not see any change when I increased the voltage by 0.5 V - the output current my circuit failed at did not change.

    With the original voltage, I didn't see VDD2 go below 11.9 V even in the moment the error occured (as mentioned earlier, there was some high-frequency noise on the signal, but I'm attributing this to the measurement setup with rather long cables to the differential probe). Would you believe the voltage can have dips when there is a 100n capacitor about 2-3 mm away from the chip?

    Do you have any idea why the short cables help but the copper foil doesn't?


  • Hello Lennart,

    I agree with you that your decoupling sounds sufficient. If I understand correctly, you have a 100 nF in parallel with a 22 µF capacitor 2-3 mm from the part.

    I was able to get a DESAT to occur when I introduced a very excessive dip in the VDD2 voltage. My setup was to short the DESAT pin to GND2 and VSS2 in order to ignore it similar to one of your above tests. VDD1 was set to 5 V, and VI+ was held high. VDD2 was set to 12 V or 15 V. I removed the decoupling capacitors near the ADuM4135 in order to help create the fast transients. I drove the VDD2 voltage from 12 V toward 0 V then back up using another gate driver in order to get a quick response.

    Ch. 3 is VDD2. Ch. 2 is nFault.

    I don't believe this violent voltage excursion would be seen on your part, but it shows on method to get the nFault to drop low without a real DESAT event.

    Changing the time scale, this voltage excursion doesn't really look too bad. CH. 1 is the control signal for the perturbation, and can be ignored:

    You mentioned previously that probing the VDD2 node fixed the issue, and also altered the waveform. I think this hints at ripple on the VDD2 line as a possible reason for the false DESAT.

    1) Are the decoupling capacitors being used relatively low in ESR?

    2) Are there excessive VIAs in the path from the decoupling capacitors to the ADuM4135?

    I don't know exactly why the cables helped the issue, while the foil tape did not. My only guess is that the cables formed just enough coupling to somehow cancel out some of the voltage ripple on the VDD2 pin.


  • Hey guys,

    I'm facing a very similar noise issue in my inverter design with the ADuM4135.  Disabling the DESAT circuit by shorting it to VSS2 and GND2 still caused false Desat trips.  The issue gets worse as we increase the switching voltage through the inverter.

    It seems like RSchnell produced a scenario where excursions on VDD2 caused a false DESAT.

    I have a 100n very very close (~2mm) from VDD2/GND2, and a 10uF on the underside of the PCB.  Given that Lennart was unsuccessful even piggybacking a 22uF on top of his 100n, I'm wondering if you guys have any other resolution besides dangling probe wires over the IC.

    We're pulling our hair out with this issue!



  • Hi

    wondering if you have learnt any more about this ADUM4135 problem and how to fix it?

    We are also seeing occasional FAULT signals, even though the DESAT pin is tied to GND2.

    We have VDD2 at 20V and VSS2 at -4V to drive SIC MOSFETs.

    In our case, adding more decoupling right at the VDD2 pins didn't help, so we suspect some sort of radiated noise issue.

    To minimize some of the effects, we are considering linking the /FAULT and /RESET pins - any comments/ issues with that?



  • Hello DM,

    I'm going to follow up with you directly. For others following this thread, portions of the thread are addressed here:

    ADUM4135 false FAULT signals latches device off 


  • Hello, 

    We have the exact same issue, may you please keep the solution or the lack of it public?

    Best regards,


  • Hello DM,

    If you don't get an answer, I would recommend you to use ISO5852S from TI, almost the same parameters and footprint compatible if rotated 180 degrees.

    Best regards,


  • This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

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    EZ Admin
  • Dear,

    Could you share the solution or some comments for this issue?  Many thanks!