need help with ADM2484E

Have received a problem at use ADM2484E - the starting bit turns out with  "step". The circuit drawing and signal photo in the appendix. In the photo:

- blue signal (3) - transmission enable - pin 5 DE ADM2484E

- green (2) - TxD signal on 6 pin of ADM2484E

- yellow (1) - RS485 line signal (DATA+ pin 14 ADM2485E)

Thanks!

attachments.zip
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  • Hello Conal,

    i don't agree with your conclusion. Now we hold device TAU-G testing - the

    first stage was a point-to-point network. We connected TAU-G directly to

    ADAM server, between contacts DATE + and DATE  have connected Rt=120 ohm.

    TAU-G has fulfilled correctly.

    The second stage we have connected TAU-G  to a working network from two

    nodes - ADAM  server and ICPCON device. This network before connection TAU-G

    worked correctly.

    In my opinion a problem that the isolated power supply ADM2587E at an exit

    from a 'sleeping mode' can't develop sufficient capacity at a first time.

    Probably, it is necessary to load an isolated power supply  in advance,

    prior to the beginning of transfer of starting bit.

    In a case unexpected bus contention we would have all bits of transferred

    sequence amazed (drawn to DATE +).

     

    Regards,

     

    Yuri Kolbasin

Reply
  • Hello Conal,

    i don't agree with your conclusion. Now we hold device TAU-G testing - the

    first stage was a point-to-point network. We connected TAU-G directly to

    ADAM server, between contacts DATE + and DATE  have connected Rt=120 ohm.

    TAU-G has fulfilled correctly.

    The second stage we have connected TAU-G  to a working network from two

    nodes - ADAM  server and ICPCON device. This network before connection TAU-G

    worked correctly.

    In my opinion a problem that the isolated power supply ADM2587E at an exit

    from a 'sleeping mode' can't develop sufficient capacity at a first time.

    Probably, it is necessary to load an isolated power supply  in advance,

    prior to the beginning of transfer of starting bit.

    In a case unexpected bus contention we would have all bits of transferred

    sequence amazed (drawn to DATE +).

     

    Regards,

     

    Yuri Kolbasin

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