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Ultra Fast Solid State Relay(problems with ADuM5230)

Hello

We have a development founded on the ADuM5230.

Architectural project is a solid state relay (circuit given).

There is a problem in the ADuM5230.

If the input is set for a long time a high level, at the output there are occasional dips to zero at the time of 840 ns.

Apparently during the normal operation of the circuit (PWM) is the same, but it is hard to catch on an oscilloscope.

Help, this is a problem with that ADuM5230 or we did something wrong?

Why is suspended production ADuM5230? There are errors in the crystals?

P.S.

     Sorry, our bad English.

     English is not our native language.

  • Vikont: I have not seen the problem you described with the ADuM5230.  The schematic you enclosed looks OK. Have you tried more than one ADuM5230 to see if you see this problem? Perhaps you can set your scope to normal single trigger on the falling edge of the output to capture a waveform when the occasional dip occurs? Also, it would be good to capture the VISO voltage at this time too, and send me a waveform to look at.

    Regards, Brian

  • Blue - the voltage at the output VOA 16

    Yellow VISO

    Blue - the voltage at the output VOA 16

    Yellow input  VIA 5

  • Vikont: Thanks for taking the scope photos and sending them. I see the output upset, where VOA goes to 0V for about 840ns on your scope photo. But, when I look at the yellow input VIA, it shows about -2V. Can you take a scope photo of VIA that is referenced to its own ground, GND1?  I am concerned that this signal which comes from DISP_FB_SW_2-DRV may not meet the ADuM5230 logic high input threshold, which is 0.7*VDD1. Also, what is the voltage at VDD1 measure?

    Regards, Brian

  • I'm sorry.

    Really wrong with the picture ... but it does not solve the problem

    The failures have been remained.

    Here's a new picture ... 5 V supply voltage.

    The same image on multiple chips. Chips with the older supplies provide more such failures in the second, # 1045, the newer chips # 1147 of such failures is less.

  • Vikont: For the output to go low for 0.84us each time may coincide with the ADuM5230 refresh time. The digital isolator channel detects input transitions and when no edge has been seen for the refresh period, which is approximately 1usec, the digital isolator channel sends internal pulses across the internal transformer to make the output state match the input.  If the input is high, 2 internal pulses are sent, if low then one pulse is sent. Under normal circumstances the output will always match the input, unless the input side power is lost, then the output will assume the default state, in this case a low state.

    If the power supplies to the ADuM5230 are very noisy, and if the noise coincides with the internal refresh pulse, it is possible for an pulse to be misread, 2 pulses read as 1 pulse and the output could be set low until the next reset pulse comes in about 1us and sets the output high again.

    I suggest you try to reduce the power supply noise, which can be generated by the internal dc-to-dc converter which draws large pulses of current on the supply pins. Place a 0.1uF ceramic capacitor directly across the VDD1 and GND pins 2 and 1, and another 0.1uF directly across the VISO and GND2 pins 15 and 14. Then let me know your results.

    Regards, Brian

  • In fact the problem was in the condenser. 0.1 uF between 1 and 2 leg was too far to the board. When installing the capacity directly to the conclusions of the problem disappeared.

    Thank you very much for your help.