I have a camera module which outputs CSI-2 over 4-lanes at 600Mbps (max resolution is 1280x1024 at 120fps).
In order to widen my net of available microprocessors (as not all low-cost options support 4-lane CSI-2), I am wondering if I can use the MAX96717 -> MAX96714 combination to serialize the CSI-2 4-lane to GMSL, then revert it to CSI-2 2-lane for integration with a SoC.
It feels that this should be possible using these devices. But I imagine I would need to double the output CSI-2 datarate to the SoC to avoid a bottleneck?