LTC4331: About link rate and actual signal frequency

Generally the link speed would be set at or slightly above the host SCL frequency; however, for proper operation, clock stretching would be required.  I'll assume that this application is using the Raspberry Pi's hardware I2C peripheral and so it doesn't support clock stretching.  Thus having the link speed set to 1MHz and keeping the cable short will allow the link to read and return the remote data bits within the low interval time of the 100kHz host side SCL.

Note that because of how the extender link operates, the timing of the different waveforms may not be as one might expect.  The resulting waveform timing comes from a hybrid of interrupts generated by the local side SCL waveform's edges and the timing fixed by link speed setting.

The LTC4331 uses the link speed for sending data across the link and for generating the timing for the high interval of the remote SCL. The LTC4331 uses the falling edges of the host side's SCL for clocking data through the link.   Therefore when the host SCL is lower in frequency than the link speed, the remote side SCL's will appear to have a distorted duty cycle with short periods of high and longer periods of low when data is being written from the host to the remote target.   When data is being read back from the target, the remote side LTC4331 clocks the remote SCL at the target link speed (unless the remote target device clock stretches the remote bus).  This data is read and returned over the link and buffered by the local side LTC4331. The remote side then holds its SCL low while it waits to see if the host will send an ACK for more data or the stop condition to end the frame.  The received buffered data is sent by the local side LTC4331 to the host as the host clocks the data out at its slower SCL frequency.  Once the local host has provided its ACK (or stop condition), the link sends the appropriate response back to the remote device.

I don't understand the purpose of including the additional I2C buffer.  If the intent is to provide level shifting, note that the LTC4331 provides level shifting down to 1.62V (which is lower than the 1.8V minimum of the IO expander target device).  This is achieved by setting the VL pin to the desired bus voltage.

Eric

Hi Eric-san,

Thank you for your advice.

So, should he set link rate 100kHz, 125kHz or 250kHz when he use host local SCL frequency is 100kHz?
And in above condition, is that no problem host does not have clock stretching function?

However, actually, the problem will be cleared when remove I2C buffer IC.
Does I2C buffer IC have any problem?

Best Regards,

Tomohiro

If the host controller supports clock stretching then the link speed could be decreased to be closer to the bus speed; however, my understanding is that in this application, the host controller doesn't support clock stretching and so the LTC4331 link speed needs to be set well above the local host SCL frequency.  See page 17 of the datasheet and the first bulleted comments under the Considerations section as well as Figure 13.

Thus the 1MHz frequency would be my suggestion (assuming that the remote device(s) are able to support the timings associated with he higher frequencies.)

In terms of the buffer, if the system works better when the buffer has been removed, then I would say it should be removed.  If there is a need / reason for why the buffer was selected, then after understanding what this need is, we can identify an appropriate alternative solution.

Eric 

Hi Eric-san,

Thank you for your advice.

Best Regards,

Tomohiro