HI
Looking the the datasheet "ADuM1280/ADuM1281/ADuM1285/ADuM1286 Rev E". page 15:
"In the absence of logic transitions at the input for more than ~1.6 µs, a periodic set of refresh pulses indicative of the correct input state are sent to ensure dc correctness at the output. If the decoder receives no pulses for more than about 6.4 µs, the input side is assumed to be unpowered or nonfunctional, in which case, the isolator output is forced to a default low state by the watchdog timer circuit."
Does this mean the output will default to low state if the input is kept constant high for more than 6.4uS or will the internal refresh pulses keep the output high beyond 6.4uS (ideally to the input goes low) ?
Br
Morten Ransborg