Design question using LTC4315

Hello Emil,

   You've asked many questions, but I'll start by asking you a question - in your system description, you've stated multiples the presence of a "long cable".  What does a long cable mean in the context of your application?  If its truly long, e.g. >50-100m you may want to consider other options such as using a pair of LTC4331 serial extenders to convert the I2C bus into/out of a field bus which can then go much longer distances and has greater inherent EMC immunity.  The serial extenders also offer additional benefits from a protocol perspective which can be valuable in certain applications. 

   Assuming your long cable is shorter and your application doesn't need the additional features of the serial extender, a bus buffer and/or rise time accelerator solution could be appropriate.

  One of key functions of a bus buffer such as the LTC4315 is to electrically partition the I2C bus into two electrically separate segments. This divides the total capacitance of the full single bus into two portions with each portion being equal to the capacitance of the segment.   In your proposed architecture, you would have one segment as the PCB with the buffer and the other segment as the cables + remote PCBs and I2C devices.  Very likely the majority of the capacitance of the bus will remain in the single segment.   In terms of reducing capacitance, placing a bus buffer on each of the remote PCBs would break the segments up into just the PCB node + 1 cable and so reduce the segment capacitance.   Note I've suggested placing a buffer on each remote PCB to allow all nodes to be similar and be independent of where they're located, but its potentially possible that a single buffer located in the middle could be sufficient; however, this would make for different nodes and how they're connected an important detail (and could be a likely source of installation error in the end application).

  Also note that the bus buffer adds a small offset voltage the VOL and so cascading multiple buffers will result in an increasing VOL level.  While I've suggested a possible solution of placing a buffer on each PCB node, it is possible that this may cause issues in your application because the cascaded offset voltages may cause VOL to exceed VIL for some nodes.  Thus, its important to verify that the most remote node's VOL + number of buffers * the buffer's offset voltage remains below the max input low threshold.  This analysis should be checked in different directions to make sure that a driven low by one node is recognized as a low at all other nodes.

  Depending on the length and gauge of your cables; the location and value of the pull-up resistors and the driving/receiving node locations and the driving node's VOL(max), you may need to also perform a similar analysis to find the VOL at different locations in the bus. The cable's series R + pull-up resistor form a voltage divider between the driven VOL and the supply voltage.  In some situations, the series resistance in the bus can introduce enough of a voltage drop between the receiving node and the driving node that the receiver fails to recognize a driven low. 

(note that the serial extender inherently addresses all of these rising VOL concerns since it drives a hard VOL on both sides of the link independent of cable length or number of cascades...)

  The rise time accelerators in the LTC4311 and LTC4315 are similar.  When the bus voltage rises above a threshold, the RTA is enabled and it will activate once it sees a sufficient dv/dt.  The enabling threshold for the LTC4315 is slightly higher than for the LTC4311 so it will be less likely to prematurely activate for larger VOL values.

  When the RTA's pull-up source is activated, it will remain on until the bus voltage approaches the supply voltage to within approximately a volt at which point the RTA's pull-up source is turned off.  If an external device pulls low while the RTA is active, there will be a contention between the RTA's source and the external device and what happens will depend on the relative strengths of the external device and the RTA.  If the RTA is stronger and is able to pull the bus up to its turn-off threshold, then that is what will happen - the bus will go high, the RTA will turn off and then the bus will go low.  If the pull-down device is stronger, then in theory it will pull the bus down to an intermediate level that depends on the relative strength of the pull-down and pull-up; however, this also requires a very narrow timing condition of the external pull-down happening precisely during the rising edge when the RTA is active.  Especially if the stronger pull-up drive is selected (15-40mA), usually the RTA is stronger and so can pull-up enough that it turns off.

  Note that because the RTA is only active during the brief rising edge transition and then it turns off, its current doesn't factor into the current limits for I2C devices from the spec.  The driving device only needs to pull down against the pull-up resistor current which can be greatly reduced due to the RTA.  When you're using an RTA, the pull-up resistors should be sized primarily to make sure that they charge the bus capacitance fast enough to trigger the RTA -  dv/dt > 0.2V/us and that usually results in a larger pull-up resistor value.  The RTA does the work of pulling the bus high and so all that the pull-up resistor needs to do is hold the bus high.

Eric