RXD pin is low when DE&RE is driven High

Hi Ashrafkamel,

   When nRE is high, the receiver output RxD is disabled and becomes high-Z. 

   If you want to keep RxD high when the receiver is disabled, you'll need to add a pull-up R to keep it high during the disabled interval.

Eric

Hi eric,

Many thanks for your reply.

and you are right, I have a voltage divider resistors to ground on RxD for level shifting 5v to 3.3v.

any ideas what should i consider to fix this?

Ashraf

Hello Ashraf,

   There are different solutions which you could consider.

1. you could operate the ADM2483's VDD1 off of 3.3V which removes the need for the voltage divider.  You'll still need the pull-up R, but since its just keeping the net high it will be easy to design with less considerations (unlike option 3 below).

2. you could separate nRE and DE and leave nRE low so that the receiver is always active which will keep the RxD pin always driven.   This would mean that the UART will be receiving the transmitted data as well as any received data.  The UART's receiver circuit will see valid data and so shouldn't generate a framing error and you could simply ignore the loopback data.  Note that this would work with option 1 as well and so allow you to omit the pull-up resistor as well.  If you keep the higher VDD1, you'll still need the voltage divider.

3. you could keep the 5V VDD1 and the voltage divider, but make the divider be fed by the supply instead of the RxD pin.  Then you would connect a diode between the voltage divider and the RxD pin.  When the RxD pin is high (or high-Z), the diode will be reverse biased and output voltage is set by the voltage divider.  When the RxD pin is low, the diode will turn on and pull the output low.  In this circuit the upper half of the divider is a pull-up resistor which will generate the rising edge.  You'll need to size this resistor based on the total capacitance on the net so that you get a fast enough rising edge.  You'll also want to make sure that the pull-up current is sized to be small enough that the RxD output can pull low enough (with the diode drop) that the UART will recognize the logic low level. 

Eric

Hello Eric,

Many thanks for this detailed respond, it is very helpful.

about solution one

can I set the VDD1 to 3.3V and VDD2 to 5V?

Yes