Post Go back to editing

Can we assure the status of Z and Y when VCC decrease below 4.5V?

Category: Hardware
Product Number: ADM1491E

Hi,

If DE, DI input status are kept constant(high or low) when the device is powered down, can we assure the status of Z and Y during the power down period?

For example, if DE is kept low, Z and Y are in high-Z mode when VCC is between 4.75V and 5.25V, then we power down the device, can we assure Z and Y are still in high-Z mode when VCC is between 0-4.75V?

  • Hello,

    I would be happy to help you with this question.

    Unfortunately, functionality for the ADM1491 cannot be guaranteed when the supply is less than 4.75V (as outlined in the electrical characteristics table), unless specifically specified in the EC table.

    In my personal experience, I would expect, with high confidence, that the driver outputs will be high impedance when VCC is below the operating range, however we have not tested the device under those conditions and cannot guarantee that is the case.

    Thank you,

    Shasta