ADUM4177 VDD1 ramp rate requirement

Hi Jeams13,

Please let me verify the ramp rate spec with the design team and I'll get back to you. 

Thanks,
Luca

I have obtained an answer from the design team to your question on the supply ramp requirements of ADuM4177.
The datasheet sentence:
“The ramp rate on the VDD1 pin must be kept below 1 V/ms to avoid stress on the primary side silicon. Both startup and operation have this dv/dt rate limitation.”

Is NOT valid for the released silicon, this was a limitation of early silicon, fixed at later stage.
Unfortunately, this sentence has not been removed from the released datasheet. We’ll fix this typo in the next datasheet revision.

I can confirm that:

• The ADuM4177 is safe to operate with a 4.4V – 7V VDD1 supply and a power supply ramp rate that matches the 5us ramp shown in the IC1 power up delay test.
• The safe range of power-up ramp for ALL supply rails is conservatively ~2us.
• For power up ramps in the 50ns to 2us range, contact ADI.
• After power up, supply jumps of up to 1V should be limited to 2us rise-time/fall-time and longer.

   
Thanks,
Luca

Thank you for your confirmation and clarification. I understand the ramp rate limitation on the VDD1.

Best Regards,