


LTC4332
Recommended for New Designs
The LTC4332 is a point-to-point rugged SPI extender designed for operation in high noise industrial environments over long distances. Using a ±60V fault...
Datasheet
LTC4332 on Analog.com
Generally I would suggest to keep the actual SPI clock frequency close to (but not over) the LTC4332 link speed.
The remote clock waveform is generated by a combination of the input edges of the local clock being transmitted across the link and the timing associated with link speed setting. In the above image the falling edge of the clock is reflected across the link. The remote side LTC4332 goes low for 1/2 of the period time associated with the selected link speed and then goes high. Because of the large difference between the actual SPI Clock frequency and the link speed setting, the remote side clock is not symmetrical high/low.
It could be that the short low period of this SPI clock is not compatible with the remote side device and so the data readback is an error due to timing issues (e.g. target device setup/hold times being violated).
I suspect that if you lower the link speed, the clock will become more symmetrical and the target device will be more happy and work and the correct data will be sent back.
Note that when the LTC4332 link is present, the actual readback data will be delayed by 1 word (beyond the normal 1 word delay for SPI readback data) and so 2x dummy reads are needed at the start of the read.)
Eric
Hi Eric,
thank you for the answer. I changed the speed index resistors on the development board to 500 kHz. There is a difference between the schematics and the real development board where the real one is configured for index 8 and the schematics is configured for speed index 6. Now the clock looks better
I also got the first byte from the SPI slave back but not more. Do you know why? For me, it looks like the SPI on the remote side is configured wrong.
Thanks for letting me know about the difference between the physical evaluation board's configuration and the documentation/intended configuration. I'll look into getting this corrected for future builds.
In terms of your data readback, I don't know what is wrong, but it appears that the hardware link is properly sending/receiving the data. I've annotated your waveforms and things all look like the LTC4332 link is behaving as I'd expect. What ever the remote device is putting on the remote bus is correctly being sent across the link to the local side bus. I don't know what your system is expecting in terms of a response from the remote device or how your controller code is working, but my first suggestion would be to look more closely at your SPI read code - make sure that you're accounting for the extra dummy read.
Eric
Hi Eric,
Maybe I misunderstood the function of the LTC4332. The LTC4332 doesn´t have an internal FIFO for more than one byte. If so this might explain the issue.
The LTC4332 has an internal FIFO which holds one word of data (up to 32 bits). The word size is set by the WORD_LENGTH register in the LTC4332's control interface, but it defaults to 8 bits.