Hi ADI team,
I've been doing a bit of reading around trying to pass MIPI CSI-2 signals across an isolation boundary and it appears as though the most common approach is to use some form of FPGA to convert the signals into LVDS and then send these signals back to another FPGA on the other side.
What I'd like to know is whether using a dedicated MIPI D-PHY to LVDS bridge, for example the Meticom 20901, would eliminate the need for an FPGA on the "isolated" side. My thinking is as follows:
DESERIALISER (MIPI D-PHY / CSI-2 OUTPUT) -> METICOM 20901 (LVDS / CMOS OUTPUT) -> ADN4624 -> FPGA (LVDS / CMOS INPUT)
The proposed MIPI D-PHY output would be running at a channel rate of 800Mbps. Both the Meticom and the ADN4624 are capable of these data rates.
However, the HS and LP output voltages of the Meticom are 1.09 - 1.31V and 2.3 - 2.7V respectively. If I power both sides of the ADN4624 with a VDD = 1.8V as specified in the datasheet, the input side should be fine to accept incoming signals (as specified in the datasheet) but what becomes unclear is whether this is even feasible. Will the ADN4624 be able to correctly transmit both HS and LP signals across the isolation boundary without significant signal distortion? Or will it not work for another reason?
Any help you could offer would be greatly appreciated.
Many thanks,
Connor
