ADM2565E
Recommended for New Designs
The ADM2561E, ADM2563E, ADM2565E, and ADM2567E are 3 kV rms signal and power isolated RS-485 transceivers. These devices are designed for balanced transmission...
Datasheet
ADM2565E on Analog.com
Hi Mike,
Sorry for the late response.
For ease of reading I report here the datasheet of the ADM2565E:
ADM2561E/ADM2563E/ADM2565E/ADM2567E (Rev. B) (analog.com)
As you rightly noted, this device has a VIO logic flexible I/O supply separated from VCC to allow communication with interfaces at different voltages. In particular, the VIO supply accepts a supply voltage between 1.7 V and 5.5 V, allowing communication with 1.8 V, 2.5 V, 3.3 V, and 5 V devices. In your case, as anticipated by you, I suggest to connect VIO (pin 7) to 3.3V to have this voltage level on RxD and TxD, matching the voltages of the FPGA.
For further information you can consult the paragraph "1.7 V TO 5.5 V VIO LOGIC SUPPLY" on page 23 of the datasheet.
Talking about the isolated power supply, when Vsel = Visoout, the Viso set point is 5.0 V. Considering that your bus works at that level, I suggest to use this setting. You can find the Vsel pin function description in table 12 of the datasheet (page 12).
Finally, assuming that Viso = 5V for your application, it is recommended that VCC is connected to 5V.
Table 14 of the datasheet (page 20), shown also below for simplicity, summarizes the possible configurations of the isolated DC-DC Converter with the associated voltage range needs.
I hope I have been helpful and clarified your doubts. If you have any other questions do not hesitate to contact us.
Good work,
Andrea