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AD LVDS isolators and their working supply and IO voltages

Thread Summary

The user is seeking clarification on using ADN462X and ADN465X LVDS isolators with 1.8V differential signals in a medical application. The final answer confirms that LVDS levels are independent of supply voltage, and the common mode voltage is 1.2V, making the isolators compatible with 1.8V differential signals. The user's Kria 24 SOM by AMD is confirmed to be LVDS compliant, and the ADN4650 can be used with 1.8V differential signals on its IOs.
AI Generated Content
Category: Hardware
Product Number: ADN4620

Hi,

(I am a LVDS newbie) I am eyeing medical LVDS isolators (Creepage and clearance > 8.3mm) to perform parallel data transimissions (Probably 100MHz per LVDS line, I am after EMC benefits, not so much speeds) between two FPGAs isolated from one another. One of my FPGAs is limited to have 1.8V differential, HP or high performance IOs, hence I am limited to LVDS18.

Looking at the "ADN462X" and "ADN465X" LVDS isolators, I can't seem to understand the relationship between the supply and the IO supply voltages. For example, ADN4624 has ONLY VDD1 and VDD2 that can take separate 1.8V supply voltages for each of the isolated sides, but then if I feed LVDS1V8 signals to the ADN4624, do I get LVDS1V8 as an output? the data sheet recommends IO signal voltages to be 3 - 3.6V. It gets complicated when we discuss the ADN4620, which not only has VDD1 and VDD2, but also VIO1 and VIO2. VIO1 and VIO2 both got a recommended voltages of 3.3V, does this mean I can only perform LVDS3V3? if I do supply the 3.3V VIO voltages for the ADN4620 and I use LVDS1V8 in the input stage, do I get LVDS1.8 as an output? I just want a solution to provide and receive LVDS1V8 on either ends of the isolation chips. 

Many thanks.

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