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Recommended Digital SPI Isolator for 2xMAX1230 ADCs

Category: Hardware

Hello,

we plan to use 2x MAX1230BCEG+ ADCs for a total 16 differential ADC channels in our design and the digital SPI interface needs to be isolated.

So, we do need a digital SPI isolator that supports 2 SPI slave devices and ADuM3154 (which supports even up to 4 slaves) seemed a good option for this purpose.

However, the MAX1230 ADCs requires additionally one back channel (for the EOC signal) each:
Therefore, the isolator needs to support SPI with 2 SPI slaves plus 2 back channels.

What would be your recommendation for an Analog Devices isolator for this use case (SPI with 2 slaves plus 2 back channels)?

Best regards and thanks in advance
Andreas



Fixing type and using official "analog.com" data sheet links instead of the ones from "mouser.com".
[edited by: abtools at 7:00 PM (GMT -5) on 22 Jan 2024]
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  • Hello Andreas,

       Simply looking at the I/O channel configuration, the ADuM3152 might be a candidate since it has 4 high-speed isolation channels for CLK, data in, data out and a chip select as well as 1 forward and 2 reverse auxiliary channels.  Thus you could use the intended chip select and the forward aux channel for selecting the two ADCs and the 2 reverse channels for their end-of-conversion signal.  

       There are, however, some timing considerations which need to be reviewed in the context of your application's requirements.  Depending on your application this isolator may or may not be suitable.

       First, the aux channels are lower speed, sampled and multiplexed so there is some jitter depending on when the input changes relative to the sampling point of that channel.  Because of the potential for skew between the aux channel and the CLK channel, you'll need extra setup time when selecting that device, which will reduce your data throughput and potential limit the number of channels and/or the sampling rate.  

       Next, reading through the MAX1230 datasheet, it appears that there are 4 different clock modes.   Two modes require an nCNVST signal to trigger the conversion start and two use an edge on SCL to trigger the conversion.  Since you didn't mention the need for isolating the nCNVST signals, presumably you're not using those modes.  For the SCL triggered conversions only one uses the nEOC signal, so based on your I/O description, I'm assuming you're planning on using the MAX1230's clock mode 10 which should work OK assuming the timing on receiving the nEOC is not critical.   Similar to the select on the aux channel mentioned above, this will also have timing jitter which will impact the sampling rate since you'll likely need to include this in the sampling period timing calculation.

      If these timing limitations are not OK for your application, I would suggest looking at using 2x ADuM340E.  This offers 4x high speed channels with very fast and well controlled timing, both channel to channel and part to part.  One ADuM340E could handle the 4x forward signals and the other the 3x return.  Depending on your isolation requirements, there are two package options for a VISO of either 5.7kVrms or 3kVrms.  

    Eric

  • Jason's comments about the MISO are good and while focusing on the timing aspects, I forgot about the potential MISO contention.   Using 2x ADuM341s would probably be a better choice.  Note that the nEOC's will need to be active even when there isn't a chip select, so put the MISO channel on the single return of the ADuM341E and the nEOC's on the other ADuM341's return channels.

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  • Jason's comments about the MISO are good and while focusing on the timing aspects, I forgot about the potential MISO contention.   Using 2x ADuM341s would probably be a better choice.  Note that the nEOC's will need to be active even when there isn't a chip select, so put the MISO channel on the single return of the ADuM341E and the nEOC's on the other ADuM341's return channels.

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