Hello ADI
A colleague of mine is having issues with the rail generation of the VDD and VEE rails on the LTC2871 transceiver. The design guidelines have been followed for component selection of the capacitors and inductor for the DC/DC convertor. The the Fast Enable (FE) pin is pulled high and the Loop Back (LB) pin is low. Outboard logic drives the state of the RS485/RS232 enable pins (DX232/RX232 & DX485/RX485) and CH2 is pulled high to disable it. Does the part look at anything beyond the state of the RS485/RS232 enable logic when deciding to enable the RS232 rails (VDD & VEE) as it appears to not get enabled as we observe almost 100% duty cycle on the SW pin and 3.3V and 0V on the VDD/VEE pin respectively?
Sincerely,
Craig MacKinnon
Christie Digital Systems
Kitchener, ON
Canada