Relationship between MAX14917 VDD and OUT_x output voltage

Yes, the MAX14917 works normally with VDD=15V. Regardless of /VDDOK indicator is used or not, the internal logic monitors the VDD level and compares it with the VDD UVLO threshold. As shown in Figure 3 on page 12, as soon as VDD falls below the VDD UVLO threshold, the OUTs will be shut down (off). In this case, you will need to raise VDD above 16V to resume the OUT operation. However, if you don't reach UVLO threshold after power up, the MAX14917 operates normally as soon as the VDD is above 10V. 
It is recommended to monitor /VDDOK signal to prevent automatic shutdown of OUT_ in case of heavy load that can drop the VDD below the UVLO threshold.

Thank you for your answer. I mostly understood.
I have an additional question.

＞However, if you don't reach UVLO threshold after power up,
＞the MAX14917 operates normally as soon as the VDD is above 10V.

Does this mean when the VDD UVLO Fall Threshold is above 7.9V and below 9.6V after power up?

When you say VDD exceeds 10V, are you referring to the VDD UVLO Rise Threshold of 9.6V?

Best regards,

Yuya

Thank you for your answer. I mostly understood.
I have an additional question.

＞However, if you don't reach UVLO threshold after power up,
＞the MAX14917 operates normally as soon as the VDD is above 10V.

Does this mean when the VDD UVLO Fall Threshold is above 7.9V and below 9.6V after power up?

When you say VDD exceeds 10V, are you referring to the VDD UVLO Rise Threshold of 9.6V?

Best regards,

Yuya

Yes, your understanding is correct. The VDD UVLO Fall threshold is about 8V (7.9V min). When VDD falls below VDD UVLO Fall threshold, the OUTs will be turned OFF. However, the VDD UVLO Rise threshold is 9.6V max. After this point the MAX14917 starts to operate normally if no VDD UVLO Fall events. That is why the VDD Supply Voltage (normal operation spec) is from 10V to 36V.

Best Regards,

Yuriy

Yuriy

Thanks for the detailed explanation!  I understand.

Best regards,

Yuya

Yuriy

I have an additional question.

Once it exceeds VDD_UVLO_R and then falls below VDD_UVLO_F, it is necessary to increase VDD to 16V or higher.

Is there a way to make OUT_x drivable without exceeding this 16V (VDD_GOOD_R)?


Best regards,

Yuya

Yuya,

Yes, you just need to power down and power up again with VDD=15V. In this case, the MAX14917 goes through a power on reset and VDD become > VDD_UVLO_R.

Best Regards,

Yuriy

Hi, Yuriy

Thank you for your answer. I understood.

Best regards,

Yuya