Hi
I am DFAE in Japan.
I simulated by ADUM4221A LTSPICE model.
Plaese see following circuit.
GNDA=GNDB=-3V, but Gate_A and Gate_B swing between VDD and 0V.
I think Gate_A and Gate_B should swing between VDD and -3V.
Is LTSPCE model correct?
Best regards
N.Kokubo
Hi N. Kokubo,
Thank you for capturing this bug. The modeling team is already working on fixing these bugs. Will let you know once the updated model was already available in LTspice library.
Best regards…
Hi NKokubo,
Just an FYI, these bugs on the ADuM4221A, B, C were already fixed.
Small RG:
Negative supply:
Kindly run the "Update Component" to update the models in your machine.
Let me know…
Hi Marc,
Thank you for raising this issue with the model - I confirmed the response and I reported this to the LTspice modelling team to fix this bug.
Let me know if you find any other bug.
Best regards…
Hi
I changed R2 and R3 from 5.1 ohm to 5.1m ohm at GNDA=GNDB=0V.
Gate_A and Gate_B swing from -4V to 15V.
Why does Gate_A and Gate_B swing from -4V to 15V?
I will use GAN. GAN needs negative gate voltage.
best regards
N.Kokubo
