Use of external V+ supply

We don't recommend this kind of application for the product since it hasn't been characterized under the required condition. Even C1 is removed, still  some parasitic capacitance exists causing V+ bounces between 2VCC and external V+. Some unexpected spurs may be generated in  the bus.

Thanks and Regards,

Zhongmin Yu

Well. According to the data sheet, the absolute maximum voltage on V+ and V- is +/-14 V, but since the maximum voltage on Vcc is 6 V, the charge pump can never generate a higher V+ than 12 V so why specify the absolute maximum voltage if an external supply is not allowed?

I have seen other circuits where it is specifically specified in the data sheet that an external voltage on V+ and/or V- is not recommended because Vcc must be applied before V+ (and V-). On the other hand, an external V+ supply is allowed on for example the (bipolar) LT1781 if it is applied to C1+, which is actually quite strange if the voltage doubler is made the same way as in the (CMOS) ADM3232E. Whether it is possible or not ought to be quite easy to tell from the schematics of the circuit including parasitic diodes.

PS. Unfortunately, LT1781 cannot be used for this application due to the high supply current of up to 14 mA, which is way above what RTS and DTR can supply.

The external power supply may be used, but the external VCC will conflict with internal VCC, causing unexpected negative effects to the system performance, like spurs on main VCC and on the bus lines. Thus it is not recommended in real applications. you can try it to see if the performance is acceptable. 

Thanks

Zhongmin

Sorry, but what do you mean with external and internal Vcc? There is only one Vcc, and during normal operation, V+ is generated by Vcc - not the other way around. Vcc is never supplied from V+ unless something breaks down, and the internal level converter must be able to handle a voltage on V+ from 0 to at least 2 x Vcc.

I am a very skilled "discrete transistor" designer, and it ought to be possible to give a clear answer. There is no unexpected spurs or other negative effects if you know and understand how the circuit is designed. The computer simulations during the design phase would have shown this.

I think that I better find another solution since "maybe or you can try it" will not lead to a professional design, but I am sorry that I cannot mark this question as answered.

Since the part is not designed for this kind of applications,  no such simulation nor measurement data available at all. Basically it is not an input pin.  In short, we don't recommend to use this part in the proposed system. If customers really want to try it, there are some possible negative effects to the system. 

Since the part is not designed for this kind of applications,  no such simulation nor measurement data available at all. Basically it is not an input pin.  In short, we don't recommend to use this part in the proposed system. If customers really want to try it, there are some possible negative effects to the system. 

"Since the part is not designed for this kind of applications,  no such simulation nor measurement data available at all."

As I told you, I am a very skilled "discrete transistor" designer, and if I had designed the circuit, I would have been able to answer this question with a clear Yes or No, and in case of No, I would have been able to tell exactly what the problem is and/or which precautions to take to make it work like for example limiting the voltage difference between V+ and Vcc.

Sorry, but I think that you don't know and then of course cannot recommend anything else than written in the data sheet, but if I could find the answer there, I wouldn't have to ask. I cannot base a professional design on guesswork and mark my question as answered, so I will find another solution.

This part is not going to be recommended  for your applications. Thanks a lot.