Product Number: MAX3107
would you inform me of the behaviour of MAX3107 for ISR setting and IRQ generation when some bits in LSR are still set.
All of interrupts are enabled in LSRIntEn register and LSRErrlEn bit is enabled in IRQEn register.
When IRQ is generated caused by LSRErrlEn and ISR is read and cleared , but LSR is NOT cleared, Is LSRErrlnt bit set again and IRQ generated again?
Edit Notes
added tag[edited by: GenevaCooper at 10:19 PM (GMT -5) on 2 Feb 2023]
