LTC2872 Trying to confirm correct wiring for switching between RS-232 and RS-485 half duplex on one transceiver block

I am excited to include the LTC2872 into a new design.  This is a late addition to a much larger system design and I am trying to confirm my understanding of the datasheet for my intended purpose.   After spending many hours with the datasheet, I contacted tech support but unfortunately stumped that very smart engineer and have been waiting many days for an answer.  This is critical path for releasing the bigger project board to proto production and here we are at the end of Friday still waiting for a confirmation.  Maybe you can help...

Let's just talk about one transceiver block and I will duplicate things on the second transceiver block.  (so instead of, for example, writing "TE885_1", we will just write "TE485")

OBJECTIVES: 

1. Implement (two, one per transceiver block of the LTC2872) software switchable RS-232 and RS-485 half-duplex ports sharing common input and output lines.  "485/232bar" pin will select the active protocol mode.  (We will control what wiring is on those connectors.  Don't worry about that .. The configuration is set once at installation time and should remain the same for a long time unless user needs to change the sensors connected to the system and then we have to reconfigure the firmware anyway at that time  )
2. Data to/from processor will use one RX line (pin) and one TX line (pin), respectively, for both RS-485 and RS-232
3. Output from LTC2872 will share two pins to the real world... RS-485 (typically designated "A" and "B") and RS-232 (typically designated "Tx" and "Rx",  That is, the physical connector will have one pin used as either RS-485 "A" or as RS-232 "Rx", and one pin used as either RS-485 "B" or as RS-232 "Tx".
4. RS-485 half duplex termination resistor will be selectable via TE485 pin on LTC2872.
5. DXEN and RXENbar will be driven by processor when using RS-485.
6. Half Duplex mode of RS-485 will be selected by H/Fbar.
7. Fast Enable mode is not needed and will be tied to turn off for this implementation.

While it would seem that this is a typical set of objectives for using the LTC2872 and there are lots of "typical" examples given in the datasheet, this set of objectives is not illustrated in any of those examples, as far as I can see.

I believe the following color-keyed illustration and schematic *might* be the correct wiring to achieve these objectives but I am not ready to commit the board until I have someone familiar with the LTC2872 confirm this.  (And as mentioned above, my hours with the datasheet and time with the Analog support engineer so far have left us both uncertain).

One other note...  I want to be certain that we don't end up with "double" termination resistors with this wiring when TE485 is enabled.

Your time and assistance are greatly appreciated.