ADN4654 Interface with High Speed Only CSI-2

lipper 1 month ago

Hello,

I am using the ADN4654 to isolate MIPI CSI-2 (High speed only) and believe the ADN4654 inputs are compatible but the ADN4654 outputs require AC caps to remove the DC offset for the MIPI receiver.

My circuit is:

DS90UB960-Q1 --> ADN4654 (100 ohm resistor across inputs) --> FPGA CSI-2 receiver (.1uF AC cap for each input).

Below are the datasheet screenshots for all 3 chips.

Are 100 ohm differential resistors across the ADN4654 inputs and AC caps on the ADN4654 outputs all that is needed?

Thanks,

Tim

DS90UB960:

ADN4654:

FPGA:

0 NQuinn

on Jan 6, 2022 4:46 PM
Hello , thank you for the query,

The ADN4654 supports the lane data rates for most MIPI CSI-2 applications, however the MIPI CSI-2 physical layer is not directly supported.

MIPI CSI-2 operates in one of two modes; high speed (HS) or low power (LP) mode.

High Speed CSI-2 signaling has similar voltage levels to LVDS and the ADN4654, with a lower common mode and differential output voltage. You're correct that the ADN4654 can support the High speed MIPI CSI-2 signaling through the use of AC coupling to shift the common mode voltage, or a DC coupling network.

Low Power CSI-2 signaling is 1.2V signal ended operating independently on each signal of the differential pair. The ADN4654 does not natively support this type of signaling.

Because the MIPI CSI-2 protocol switches dynamically between Low Power and High Speed mode, the ADN4654 alone can not be used; some wrapper circuitry is required. A MIPI CSI-2 to LVDS bridge is the most effective solution for this.

There are some similar posts on this topic here:

https://ez.analog.com/interface-isolation/f/q-a/164742/adn4654-for-isolating-mipi-csi-2/433314

https://ez.analog.com/interface-isolation/f/q-a/544364/alternate-ic-suggestion-for-adn4654/419980

Regards,

Neil
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0 lipper on Jan 14, 2022 6:22 PM in reply to NQuinn

Thanks Neil,

We verified even with continuous clocking it does not work and have implemented a CSI2 to LVDS converter.

Regards,

Tim
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