ADUM1411 with unpowered VDD1


I'm using 12pcs. ADuM1411 in oder to drive isolated ADCs with a single SPI. In my design I connected MISO to V_OD of all ADuMs.

The Idea was to use a transistor to power up VDD1 only when needed (i.e. when CS goes low).

Looking at the truth table in the datasheet, V_OD should go High-Z when VDD1 is unpowered and the output pins V_OA, V_OB and V_OC should go high (assuming CTRL1 is unconnected).

But this is not the case. Even with VDD1 completely disconnected the ADuM is still passing signals from V_IA to V_OA and VDD1 is **sourcing** 2.4V!! Only when I tie VDD1 to GND1 I can see the specified behavior (but then I have 50mA(!) running from VDD1 to GND1).
Is there anything I'm missing here?

Thanks in advance!


  • Hi Detlef,

    VOD should go High-Z when Vdd2 is powered and Vdd1 is unpowered. That means VOA , VOB and VOC will have their input side (Vdd1) unpowered, and output side (vdd2) powered so these outputs will be in the default state, determined by the CTRL2 (Not CTRL 1). If CTRL2 is unconnected or high then VOA VOB and VOC will go high. CTRL1 controls VOD not VOA VOB AND VOC.



  • Hi Detlef, 

    It sounds like the application's signals are back powering the isolators power rail through the ESD diodes. There is the potential for current to flow through VIA, VIB, VIC, VOD and CTRL1 pin if a voltage greater than one diode drop above VDD1 is applied. If VDD1 is unpowered, a typical signal will be well above a diode drop. 

    After that circuit issue is resolved, please note that there is the potential for contention on the MISO line when multiple isolators have the VOD channel tied together on the same trace. The chip select signal and the CTRL1 pin can be used to prevent this state.

    AN-1478 may be useful to introduce different isolated SPI options and considerations.   



  • Thanks for your quick response.

    But VOD doesn't go High-Z when Vdd2 is powered and Vdd1 is unpowered as long as VIA, VIB or VIC are still receiving signals. I'm using VIA and VIB for CLK and MOSI in parallel to all ADUMs

    Pin1 is not connected. If pulled to GND VOD goes high-Z, but I see 50mA running from pin1 to gnd.

  • Back powering through ESD diodes would explain the 2.4V I'm measuring on the unconnected pin1. But then it should be mentioned in the datasheet that all VI's on the unpowered side must be open or "0" for VOD to go high-Z. If you share a CLK pin among different devices the whole thing is not working...

    Oh well, I guess I need to redesign this and use the ADuM1401 with an inverted CS on the enable-pin. Strange that the ADuM1401 needs a high level to go active while most busses use !CS (active low). 

    Or maybe the best idea would be to add a MUX to the VOD / MISO trace. Do you think something cheap like a CD74HC4067 would do the trick?

  • He Detlef,

    The MUX may be a solution for MISO contention issue, but remember that each input and output has an ESD protection diode between the pin and the VDDx rail. Presumably the CLK and MOSI signals are routed to each isolator as well. If VDD1 were unpowered, the CLK and MOSI could still backfeed the rail. 

    You are correct that the logic of the nCS is opposite the VE1. An inverter can be added in series for that functionality. The advantage to that route would be that the propagation delay through the MUX would not slow down the max SPI clock rate. AN-1478 goes into further detail on isolated SPI timing considerations.