Are there any special precautions or effective measures to take when designing to avoid these problems?
How do you detect the slew rate (0.5V/us or more)?
When sampling, I am wondering if that frequency affects RF.
Please answer here as well.
The condition for turning on the constant current of the LTC4311 is that VTHR = 0.55V & Slew rate exceeds 0.5V/us.
When using the LTC4311, I am worried that the rising edge may be erroneously detected and the constant current may be turned on.
For example, a whisker on Ack or the waveform of Fall becomes stepped.
Is there anything I should be careful about when designing to prevent such false positives?
And what principle does the Slew rate detector detect?
Are you sampling and calculating the voltage internally?
In that case, there is concern about the influence on RF, so could you tell me the sampling frequency?
If there is noise or crosstalk severe enough to trigger the LTC4311, the underlying signal integrity problems will need to be corrected. I would first be most concerned with extra clock edges causing data corruptions.
Non-compliant levels may cause runt pulses or glitches. When the LTC4311 detects a rising edge, it boosts the signal up to around VCC-0.4 and then goes idle. Some devices have a Vol higher than 0.4V and will create these issues. Pay attention to the datasheets and loading.