I'm designing a motor driver using the ADuM4136.
From the datasheet Table 9, I've noticed that there are some conditions under which the READY and /FAULT pins have "UNKNOWN" states.
Can you explain this a bit more? For instance, if power is not applied to VDD2, READY will be low, and /FAULT is UNKNOWN.
Will /FAULT maintain its last state? Will it randomly toggle between states?
Likewise, if /FAULT is asserted during normal operation (goes low), READY has an "UNKNOWN" state listed.
If I read back LOW on both /FAULT on and READY, how can I determine if I am undervoltage/overtemperature OR have a DESAT condition?
Apologies if I am not thinking about this correctly or if it is answered elsewhere.
Thanks in advance,
Looking back at this truth table, I can see how it is a little confusing. I'll see if I can come up with a different representation. There are some time dependent events that make the nFAULT pin logic not purely combinatorial, which is hard to represent in the truth table. The basic things to know are:
1) The READY pin is high if VDD2 is above the secondary side UVLO, and there is no TSD occurring. The READY pin does not depend on if there is a DESAT fault condition or not.
2) The nFAULT pin will go low if a DESAT fault occurs, and will stay low until either of two things occur:
a. nRESET is toggled low then high.
b. VDD1 is toggled off then on.
The reason nFAULT is unknown if VDD2 is unpowered is because nFAULT's condition depends on whether a fault is latched on the primary side or not. If VDD2 was powered, and a fault occurred, then for some reason VDD2 is unpowered, nFAULT would have a fault latched until nRESET or VDD1 is toggled.
If you read back low on nFAULT and READY, it would mean
1) a fault has occurred earlier
2) VDD2 is below UVLO2 - AND/OR - the die temperature is too hot and the part is in TSD.
I hope this helps. Let me know if it's not clear.
No, I think that makes it clear. Thank you! But just to be sure...
To summarize, READY has no dependence on DESAT (or /FAULT).
/FAULT will not update its state when VDD2 is low (the last state will be latched). Toggling RESET -OR- VDD1 will reset /FAULT regardless of the state of VDD2.
Also, not to be pedantic, but isn't this the same behavior /FAULT would give if VDD2 _was_ present? IE, /FAULT latches until VDD1 or /RESET are toggled whether or not VDD2 is present?
You bring up a great point. We are looking into how to change the truth table to reflect the nFAULT and READY better.
And, yes, nFAULT will act the same whether VDD2 is present or not, once a fault latches.