ADuM3224 : The delay time from input VDDA(VDDB) to output VOA(VOB)

Hello ,

I have a question about transition when ADuM3224 was powered on.
The VDD1 is powerd on before VDDA(VDDB), and the VDDA(VDDB) is powered on after VDD1.
VDDA is powered on after VDD1 more than 100ms later.
The VOA(VOB) will be setup with some delay from VDDA powered on.
This "Delay" is indicated as 50 us in the tabel-13 of the datasheet.

Our customer is using two ADuM3224 to drive a full-bridge circuit.
This customer has a concern about variation of this delays , because if the VOA delay and the VOB delay has a difference the balance of full-brigde may lose.

So the customer wants to know the maximum delay that are possible.
I know this delay is not guaranteed value, but, we wish to know the maximum delay which is occurring possible.
Do you know the maximum delay from input VDDA(VDDB) to output VOA(VOB)?

Best  regards,

y-suzuki