ADM485E open fail safe issues

Dear Sir

      I have used an exception when using ADM485E communication. Some questions I would like to ask.

(1)  ADM485E supports open fail safe function in RX mode in the datasheet, and the output is high level.

       When all RS-485 driver is RX mode,the AB input floating, the output is low. But this state will cause the RS-485 start bit to be indeterminate.

       Why  output status does not meet the datasheet ?

(2)  The RS485 fail safe biasing circuit , R1 & R2 resistance installed on the master side or slave side?

 

    

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  • Hello,

    Thank you for your query.

    1) The ADM485E has open-circuit failsafe only. This means for the failsafe to function there can be no connections between the A and B pins of the ADM485E device (no termination resistance, failsafe biasing or other nodes on the bus). In the case where no connection exists between the pins, the receiver output will failsafe to a logic high output. However in the case where the A and B inputs are terminated, or shorted together, the receiver output will be indeterminate.

    In the case where true receiver failsafe inputs are required without an external failsafe biasing network, I can recommend the ADM3065E generic, which output a logic high in cases where the bus is open circuit, terminated or where the A and B pins are shorted together.

    http://www.analog.com/media/en/technical-documentation/data-sheets/adm3061e-3062e-3065e-3066e.pdf

    2) The failsafe biasing circuit must be implemented at the same point where the bus is terminated. It is important that there is not failsafe biasing implemented at multiple nodes. For this reason it may be easiest to implement at the master side of the network.

    Kind Regards,

    Neil

Reply
  • Hello,

    Thank you for your query.

    1) The ADM485E has open-circuit failsafe only. This means for the failsafe to function there can be no connections between the A and B pins of the ADM485E device (no termination resistance, failsafe biasing or other nodes on the bus). In the case where no connection exists between the pins, the receiver output will failsafe to a logic high output. However in the case where the A and B inputs are terminated, or shorted together, the receiver output will be indeterminate.

    In the case where true receiver failsafe inputs are required without an external failsafe biasing network, I can recommend the ADM3065E generic, which output a logic high in cases where the bus is open circuit, terminated or where the A and B pins are shorted together.

    http://www.analog.com/media/en/technical-documentation/data-sheets/adm3061e-3062e-3065e-3066e.pdf

    2) The failsafe biasing circuit must be implemented at the same point where the bus is terminated. It is important that there is not failsafe biasing implemented at multiple nodes. For this reason it may be easiest to implement at the master side of the network.

    Kind Regards,

    Neil

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