ADIN1110
Recommended for New Designs
The ADIN1110 is an ultra low power, single port, 10BASE-T1L
transceiver design for industrial Ethernet applications and is compliant with the IEEE® 802...
Datasheet
ADIN1110 on Analog.com
ADIN1100
Recommended for New Designs
The ADIN1100 is a low power, single port, 10BASE-T1L transceiver designed for industrial Ethernet applications and is compliant with the IEEE® 802.3cg...
Datasheet
ADIN1100 on Analog.com
Hi ADI,
I try to make the frame generator and check function to work on adin1110. But the reading seems incorrect.
My setup is a EVAL-ADIN1100EBZ board (with original ADI FW 12.3.24193e28) + linux laptop connecting with a target board (adin1110 + processor (Xilinx Linux Kernel 6.6.10)). I can read and write the registers via a script build on phytool on the target board.
Test procedures are like below.
1. Power on both board. Make EVAL-ADIN1100EBZ work on mode 15 as below.
2.Ping between adin1110 and adin1100 successfully.
3.Set the adin1110 into frame generator mode
$./c45_access.sh write eth1 0x1 0x1F 0x8027 0x0
$./c45_access.sh write eth1 0x1 0x1F 0x8028 0x0
$./c45_access.sh write eth1 0x1 0x1F 0x8020 0x1
$./c45_access.sh write eth1 0x1 0x1F 0x8022 0x1
$./c45_access.sh write eth1 0x1 0x1F 0x8025 0x6b
$./c45_access.sh write eth1 0x1 0x1F 0x8026 0xc
$./c45_access.sh write eth1 0x1 0x1F 0x8021 0x9
4.Set the fame check of adin1110
$./c45_access.sh write eth1 0x1 0x1F 0x8001 0x1
$./c45_access.sh write eth1 0x1 0x1F 0x8005 0x0
$./c45_access.sh read eth1 0x1 0x1F 0x8008
$./c45_access.sh read eth1 0x1 0x1F 0x8009
$./c45_access.sh read eth1 0x1 0x1F 0x800a
$./c45_access.sh read eth1 0x1 0x1F 0x800b
$./c45_access.sh read eth1 0x1 0x1F 0x800c
$./c45_access.sh read eth1 0x1 0x1F 0x800d
$./c45_access.sh read eth1 0x1 0x1F 0x800e
As my understanding, if the adin1110 is checking the data from PHY and the EVAL-ADIN1100EBZ is in normal mode, I should get a lot of errors. But the error count is 0 as below. Why? Did I do anything wrong?
SMohammadi - Moved from Linux Software Drivers to Physical Layer Devices. Post date updated from Tuesday, November 5, 2024 6:47 AM UTC to Thursday, November 14, 2024 5:25 PM UTC to reflect the move.
SMohammadi - Moved from Linux Software Drivers to Physical Layer Devices. Post date updated from Thursday, November 14, 2024 5:25 PM UTC to Thursday, November 14, 2024 5:25 PM UTC to reflect the move.
Hi,
Based on your setup and the steps you’ve followed, it seems that everything is configured correctly. The fact that you’re not seeing any errors in the frame checker is actually expected. To intentionally generate errors for testing, you can try the following:
Incorrect Frame Length: Set the frame length (FG_FRM_LEN) to an incorrect value that doesn’t match the expected frame size. This can cause the frame checker to detect errors.
Modify Interframe Gap: Change the interframe gap (FG_IFG_LEN) to a value that is too short or too long, which can disrupt the timing and cause errors.
When the frame generator is enabled, the data path is fully taken by the frame generator, so there is no data collisions between frames coming from the MAC and frames coming from the frame generator.
Regards,
Shazia
Hi Shazia,
Thanks for your reply. I thought if the generated frame was not loopback by link partner on the remote side, it should detect the frame error. Is it the case? If it is not the case, then how I know whether the link partner on the remote side and the link between them works well?
Cheers
Hi Fan,
You will not see any frame errors when the generated frame is not looped back by the link partner on the remote side. To ensure, the link between them is functioning correctly, you can generate the frames from the ADIN1110, have them looped back by the link partner on the remote side and then validate the frames received by the frame checker at the ADIN1110. Please refer to the block diagram below of Frame Generator and Checker Used with Remote Loopback with Two MAC-PHYs.
Regards,
Shazia