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ADIN1100_latency

Category: Datasheet/Specs
Product Number: ADIN1100

Hello

Could you teach me about the latency of ADIN1100 ?

Question 1

The  datasheet descrbes MII transmit latency is typ <1.8us at test condition 18 bit frames.

Does this mean that it takes  < 1.8us from  the 18bit input of MAC to the  18bit output of TXP/N ?

If there is misunderstanding , please let me know your advice.

Question 2

The spec of latency is typ. 

how much variation should we estimate    ?

 (Roughly,  I would like to know the variation of 10% ,50% or 100%)

Question3

What is the spec of latency In fRMII and RGMII ?

Regards,

Teli

  • Hi Teli,

    Please see below comments for your questions:

    Question 1: It means that from TX_EN sampled with TX_CLK, to the first symbol of the start of packet presented on the MDI, the typical delay is 1.8 us (=18 bit-times) (at 10Mbit/s 1 bit is 0.1us).

     Question 2: The latency variation in MII mode should be small, and would depend on the device delay variations across PVT, which would be a few ns (< 1%).

    Question 3: 

    RGMII: The TX latency will be larger because there is a FIFO in the TX path. The additional latency will depend on the TX FIFO configuration. For the default configuration the additional latency added by the FIFO will be 1.4 us +/- 0.2us

    The RX latency will be similar to that of the MII RX latency, slightly larger due to the RGMII RXC delay (8.3 ns)

    RMII: In RMII there are FIFOs in both the TX and RX path. Therefore there will be an additional variable latency which will depend on the TX and RX FIFOs configurations. The default setting adds 1.4 us +/- 0.2 us in each path. In addition, in the TX path there is a variable +/- 200 ns latency depending on the alignment between the 50 MHz RMII REF_CLK and the internal PHY transmit clock.

    Regards,

    Shazia