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Ethernet PHY

Category: Datasheet/Specs
Product Number: ADIN

Hi ADI,

Our customer currently reviewing the datasheet of ADIN1300 for their industrial application.

While checking its schematic and the PCB layout, they found below queries which would like to get ADI confirmation: 

  1. In the evaluation board, it is mentioned that signals are placed on an inner layer with ground above and below. In the layout, it is placed on top layer. Must we place it on inner layer?

From the layout guidelines, understand the EVAL-ADIN1300FMCZ consists of 4 layer PCB (top layer, 2 inner layer, and the bottom layer)

The carry signal and routing signals will be coming from the top and bottom layers. However in the schematic design, we could see PLACE SIGNALS ON AN INNER LAYER WITH GROUND ABOVE AND BELOW STICK GND VIA AROUND GROUP OF RX AND GROUP OF TX LINES in the FMC connector portion. Please clarify. 

2. TX signals series termination with zero OHM resistor. Is it a must? Any significant impact if without zero OHM termination at TX line.

According to the schematic of the ADIN1300 EVK, the termination resistor of TX have to be placed 0 ohm, is this related to the internal MDI termination?

3. All Tracks need to be length matched. Length match is applied to TXD group RXD group separately or both must be matched.

                  All TX signal trace lengths must match to each other and all RX signal trace lengths must match to each other, please confirm?

  1. MDIx_P and MDIx_N, there are 4 pairs. Do we need to match the length? Are all 4 pairs need to be matched at same length?

Thanks in advance.

  • Hi,

     

    Thank you for getting in contact, please see below for replies to the questions asked.

     

    Q1 – No, these signals do not need to be placed on an inner layer. They can be placed on the top layer.

     

    Q2 - The 0 Ohm links and not required. On the EVK these were put in to have options on the board. There are many sections of the EVK that are not necessary in a final design, but were included to give options on the EVK.

     

    Q3 - The TX and RX groups can be looked at separately, the TX group of pins should be length matched to each other, and the RX group of pins should be length matched to each other. Where possible, route these interface pins on the same side as the component pins. Keep trace lengths as short as possible. Route traces with an impedance of 50 Ω to ground.

     

    MDI Pins - MDI traces should be kept as short as possible (less than 1 inch in length), and individual trace impedance of these tracks must be kept below 50 Ω with a differential impedance of 100 Ω for each pair. Each differential pair should be length matched and all 4 pairs should be length matched also. The same recommendations apply for traces running from the magnetics to the RJ45 connector. Impedance must be kept constant throughout. Any discontinuities can impact signal integrity.

     

    Best Regards,

    Mark

  • Hi Mark,

    Thanks for the answer.

    Would like to further check on the Q3 and Q4.

     Q3 : What is the length matching requirement? E.g., 100mils, 500mils? Could you share more info on the PCB design guide on RGMII mode? 

     Q4 : What is the length matching requirement for both inter and intra differential pairs? Does RGMII mode only has the single-ended signal?

  • Hi, 

    For the MAC interface TX and RX groups, the length matching should be kept within 60 mils. For other layout recommendations please refer to the ADIN1300 Layout Considerations WIKI Page which can be found Here .

    Yes the MAC interface  which is in RGMII mode has single ended TX and RX traces. The MDI signals are differential pairs, with 4 differential pairs. For the MDI traces, the intra differential pairs these should be length matched within 20 mils for 1G operation and within 50 mils for 100M or 10M operation. The inter differential pairs are not as critical and should be length matched as close as possible, but within 1000 mils.