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[ADIN1300]: No output signal on GP_CLK pin

Category: Datasheet/Specs


I tried to generate 125 MHz frequency in GP_CLK (pin 27), I set GE_CLK_CFG
register (&0xFF1F) to 0x0010 for free clock selection and register GE_IO_GP_CLK_OR_CNTRL (&0xFF3D) to 0x0007 to enable GP_CLK output but i didn't get any output signal.
Is there any configuration missed?

Best Regards,

[locked by: CatherineR at 11:08 AM (GMT -4) on 28 Mar 2023]
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