[ADIN1300]: No output signal on GP_CLK pin

Nader

on May 31, 2022

Category: Datasheet/Specs

Hello,

I tried to generate 125 MHz frequency in GP_CLK (pin 27), I set GE_CLK_CFG
register (&0xFF1F) to 0x0010 for free clock selection and register GE_IO_GP_CLK_OR_CNTRL (&0xFF3D) to 0x0007 to enable GP_CLK output but i didn't get any output signal.
Is there any configuration missed?

Best Regards,
Nader

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0 MarkBolger

on May 31, 2022 3:39 PM
Hi Nadar,

Could you confirm what your MAC interface selection, PHY Configuration and MDIX Configuration? I can see the clock on the GP_CLK pin on my setup here, I want to make sure I am trying to recreate what you are seeing by doing a like for like comparison with the above mentioned settings.

Best Regards,

Mark
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0 MarkBolger

on May 31, 2022 3:39 PM
Hi Nadar,

Could you confirm what your MAC interface selection, PHY Configuration and MDIX Configuration? I can see the clock on the GP_CLK pin on my setup here, I want to make sure I am trying to recreate what you are seeing by doing a like for like comparison with the above mentioned settings.

Best Regards,

Mark
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