Hello, i am trying to get the ADIN1100 to work in MII mode.
My understanding of the standard MII interface is that there should be a TX_clk and RX_clk signal all the time on the according pins and that those clock signals should be generated and driven by the PHY itself. unfortunately these signal remain flat on my PCB. Which conditions have to be met for the PHY to generate Clock signals on RX_clk and TX_clk?
I have the ADIN1100 connected to a controller with integrated MAC interface. MAC IF Select pins of the ADIN1100 are strapped to supply voltage via 4.7k pull up resistors to select MII interface over RMII
since i initially designed the the schematic and PCB with the "preliminary datatashet" Cext 1 through 4 are all placed as described in the document. while searching for errors i removed Cext 1 and 4 to match the guidelines in the Revision 0 Datasheet which had been released shortly after i finished the design.
Input clock is measured to be stable 25Mhz with an amplitude of about 2.1 Vpp as described in the Datasheet. clk output (unused in this application but measured for debug purposes) is stable at 25MHz 1V Vpp. the Clock is provided by a 25MHz Oscillator connected via 2 capacitors as recommended in the Datasheet (by calculations as described in the datasheet we specified 47pF series and 10pF parallel)
Let me know if you need any further information to answer this, i'll be happy to provide it.
Thanks in advance
Jo Maier
