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ADIN6310 custom hardware verification

Thread Summary

The user had issues connecting to the ADIN6310 switch via Ethernet and flashing firmware. The problem was resolved by strapping the PHY into unmanaged mode and reflowing the ADIN6310 chip. For RGMII MAC speed matching, the user needs to route the PHY's MDINT pin to the host to trigger the host to read the PHY and adjust the switch port speed. Using ADIN1300 PHYs would allow automatic speed matching without additional host intervention.
AI Generated Content
Category: Hardware
Software Version: 5.0

Hello, 

I have been working on verifying some custom hardware with the ADIN6310. I am having some troubles connecting to it, so I have yet to flash the firmware on it for the first time. My goal is to be able to flash firmware/configure the switch on ethernet port 0, which will be driven by a microcontroller. I am still waiting on the software for the switch to be configured by the microcontroller, so I am trying to verify the switch by connecting to port 1, which has a standard ethernet phy.

I believe I have some simple things working and verified, but I am lacking the ability to connect to the host port via Ethernet. Here is what I have verified so far:

 - I can strap the switch for SPI communication and see the pulses on the TIMER0 line every 1.25 seconds. This leads me to believe that my power/pinout/crystal oscillator is in a good enough shape to at least have the switch be able to communicate. 

 - When I strap the board for Ethernet communication, I have scoped the 125MHz clock signal (Px_TXC). It seems to be stable and clean. 

I am trying to connect to it via the "...tsn_evaluation_util.exe" and I am not having any luck. Should I be able to connect to a switch that has never had any firmware flashed to it? 

I know there is a driver example on github (this guy). I went to download it, and I am not able to build the project. It says that I am missing header information. I have provided a screenshot below:

Is there something I am missing for this project?

Any help you can provide would be greatly appreciated. 

Thanks,

BW

Thread Notes

  • Hi,

    Regarding the "tsn_evaluation_util.exe", could you share the specific error message you are seeing?

    The tool should still be able to connect to the switch even if no firmware has been loaded

    To help narrow down, could you provide a PCAP capture of the traffic between the PC and the switch during the connection attempt?

    Also have you installed npcap?

    For the driver example, the adinx310 driver needs to be downloaded separately and placed in the adinx310-driver folder within the driver project.

    The driver library is available on the ADIN6310 product page, sharing the link here for the drivers as well: Driver Library

    The project was built using Visual Studio 2022.

    Based on the screenshot you shared, you may need to retarget the project or install additional build tools.

    Regards,

    Karl

  • Hi Karl, 

    Below is the response from the evaluation tool. It looks like the tool is not getting any response back from the switch. The wireshark trace also indicates that. 

    I should also mention that I am able to connect to the evaluation board "EVAL-ADIN6310" with the evaluation utility. I think the main unknown was whether or not I could connect to a switch without firmware. 

    Thanks,

    BW

  • Hi BW,

    Yes, the ADI GUI tool can be used to load or update firmware on a fresh device. 

    An unprogrammed device should be sending image request frames over the ethernet interface. These would be sent two messages every 1.25s. The wireshark you show above don't show those messages, so I'd start to check on things around the host port configuration - how the delays are set (delays in TXC/RXC - only once in each path), is the host strapping correct (versus the link speed etc), what is the PHY etc? Have you already shared your schematic with us or can you? It might be helpful to track down the problem. It's good you've been able to confirm activity on timer0 with SPI host interface and also the TXC activity for ethernet strapped host -> sound like switch is alive and we just need to figure out the blockers. 

    If you prefer not to share your schematic directly here, then we can point you to an email box to send it to. 

    best regards,

    Catherine. 

  • Hi Catherine, 

    I can share a subsection of the schematics with you, and I would prefer if I can send it to you privately. Can you please send the email?

    I look forward to your response. 

    Thanks,

    BW

  • Hi Catherine, 

    I wanted to follow up on this. Can I still send in schematics?

    I have also found that the voltage levels at the phy, from the switch, are lower than the target voltage level. I am running the ports at 2.5V and at the phy, I am seeing the wave forms generating at around 1.8V. I have verified that my 2.5V regulator is producing a solid voltage. Could this indicate an impedance issue?

    Thanks,

    BW

  • Hi BW,

    Sending you an email address to share the schematic to. When you refer to running the ports at 2.5V, I assume you referring to VDDIO rails for the PHY and switch? Please include power circuit in the schematic you share. Can you share a plot of what you are seeing?

    thanks,

    Catherine. 

  • Hi Catherine, 

    I have attached the below waveform that I was seeing. For some background, I am attempting to connect to the switch on port 1 at 100 MBps, RGMII. This is a waveform of the TX3 data line, with the VDDIO B rail at 2.5V. The cursors on this scope indicate that the levels are at 1.8V, All other data lines look like similar to this. 

     

    Will this picture suffice?

    Thanks,

    BW

  • Hi BW,

    Thanks for sharing. This is strange, I would have expected the signals to swing between the rails. Are you sure the VDDIO rail is coming in at 2.5V? Send on your schematic via email when you get a change (you should have received an email to the address you registered with). 

    best regards,

    Catherine. 

  • Hi BW, 

     Thank you for sharing the schematic. We are currently reviewing. May I please check a few queries with you: 

    • Please outline how you intend to configure ADIN6310 host strapping.  
    • Please advise if you have made any component or hardware changes to the board.  
    • Is the PHY correctly strapped for unmanaged mode, and is it bringing up a link? Interested what link speed the PHY is supporting also.  

    Your input on these will help our review as we get to a resolution. 

     

    Thanks,  

    Ciara 

  • Hi Ciara, 

    I have actually made progress this morning, and I think I have things working now. I had to solve two things:

    1. My Ethernet phy was not in an unmanaged mode. It was confusing, because I could establish the link, but the configurations on the MAC side were all wrong. I made hardware changes to strap it into unmanaged mode. 

    2. Solderability on the chip itself. I reflowed the ADIN6310 on my board. When things cooled down and I connected to the board to my PC, I immediately started to see the two periodic broadcast messages come through on my traffic sniffing software. From there, I was able to connect to it with the Evaluation Utility and download firmware. 

    So, I think for now, I have what I need working. Thanks for your time and help with this! It means a lot! 

    Thanks,

    BW

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