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KCC's Quizzes AQQ272 about clock and data race

A new challenge (AQQ272 about a clock and data race)  is here:

The above 3 circuits use D-Flip-Flops (yellow) and clock buffers (blue). The buffers have slightly longer delays than the DFFs (it is due to both buffer intrinsic delay and long distances caused by the clock buffer tree).

Question: which of the 3 circuits is the best for data integrity? And why?

Good luck and try to be among the firs ones!

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  • Looks like Clock C is best because the clock drives only a single buffer, and the clock buffers accumulate in the same direction as data and therefore are guaranteed to lag it, so that S&H specs can be met (data present before clock edge)

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  • Looks like Clock C is best because the clock drives only a single buffer, and the clock buffers accumulate in the same direction as data and therefore are guaranteed to lag it, so that S&H specs can be met (data present before clock edge)

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