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KCC' Quizzes AQQ270 about a difference amplifier challenge

1. Quote of the week: 

2. New challenge AQQ270 about a Difference Amplifier challenge (this is a proposal from our colleague

Martin Walker, Product Marketing Leader at ADI UK – warm thanks to him!):

Below is the classic difference amplifier circuit.

Questions:

 1. What is the Common Mode Rejection Ratio (CMRR) if we have perfectly matched resistors?  [Assume the amplifier’s CMRR is 120dB]

 2. What is the CMRR if the resistors have a tolerance of 0.1%?

 3. What is the CMRR if the resistors have a tolerance of 1%?

 4. What input resistance does V2 ‘see’?

 5. What input resistance does V1 ‘see’?

 6. If the difference amplifier was AC-coupled, what impact would this inequality in input impedance have?

Good luck!



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[edited by: GenevaCooper at 1:18 PM (GMT -4) on 20 Sep 2024]
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  • 1. CMRR=120dB

    2. You can use the approximation CMMR∼1/t, with t=tolerance. So you get CMRR=60dB for t=0.1%

    3. CMRR= 40dB, t=1%

    4. In an ideal opmap you see an infinite resistance at the non-inverting input (in fact it is typically used as a buffer configuration)

    5. In an ideal opamp you see R1 at the inverting input (in fact the non inverting input is a virtual ground)

    6. Not sure I understand 100% the question. But if you are to AC-couple both the inputs, you need to place capacitors at the inputs and the impedance will depend on frequency. 

  • 1. CMRR is 120 dB (all resistors are exactly 1k, otherwise ideal opamp.).  120 = 20 log (Ad/Acm) implies Ad = 10^60 Acm;  Acm negligeable in front of Ad.

    3. With 1% resistor, I get a 1.5% max change for Ad  ( R1=1.01K, R2=R4=990 and R=1k), ( Acm still negligeable since it is opamp dependant).
    2. With  0.1% resistor, I get a 0.06% max change for Ad  (R1=999, R2=1001, R3=1000, R4=999).  I confess that  used a simulator to obtain those numbers. My simulation may be incorrect.

    4.  R3 + R4
    5.  R1+ R2   (again, confirmed with the simulator,  (V+in - Vout) / Ir1)

    6. Not sure about the question. I add a capacitor parallel to R2 or to R4 ?  And definitively, if the input is AC, the frequency would impact the amplification.

  • Hi Gaetano,

    That was quick!

    The approximation 1/t is a little on the optimistic side for CMRR but is a good first approximation, taking into account the differential gain is 1, so congratulations on the CMRR questions.  If anyone else knows of a better estimate for CMRR, please share!

    You are correct that the op-amp has a close to infinite input impedance, and because of that IN+ sits at a voltage governed by the potential divider R3 and R4, in this case V2/2.  Therefore V2 'sees' a 2k input resistance to ground.

    The impedance that V1 'sees' is much more interesting.  You would think that it should be the value of R1, 1k, as you say, but the IN- has the 'virtual ground' voltage across it (V2/2) that is in anti-phase with V1, if V1 and V2 are equal and opposite in phase.  So, a bit like bootstrapping in reverse, it changes the effective resistance of R1, depending on the value of V2.

    The upshot of this for capacitively coupled inputs is that you need to modify the coupling capacitor values if you want to maintain the same cut-off frequency for the high-pass filter formed by the input R and C.

  • Hi vanderghast,

    Yes, using a simulator with the resistance as a parameter you adjust to take into account the tolerance can help.  I make 1.5% about 36dB and 0.06% about -64dB, again matching closely with the theoretical work on this.

    Bingo on Q4.

    On Q5, try the simulator with equal and opposite voltage sources.  You'll find that the effective resistance that V1 'sees' is less than 1k!  Take a look at the current through R1.  Is it what you expect it to be?

    On question 6 I was more thinking about capacitively coupling the inputs and what effect the different input resistances would have on the cut-off frequency. 

  • In theory, with perfect resistors, you are correct, the CMRR will just be the CMRR of the amplifier.

    One of my favorite sayings is, in theory there is no difference between theory and practice but in practice there usually is...

    This quiz was actually inspired by a real customer question where they were seeing a DC offset on their motor current measurement that increased linearly with the common-mode voltage.  They thought the amplifier might be faulty but in reality they were just seeing the effect of resistor tolerance on CMRR.

    The CMRR is actually significantly worse than the numbers you have given.  gpiarino used an estimate and vanderghast used a simulation to get close to the real figures and there is a better approximation given in one of our Instrumentation Amplifier app notes...

  • About Q5, with opposite input voltages, V-in - Vout  will also increase. The current through R1 is then such it is still matching (V-in - Vout) / 2000.

    Here is a snapshot. I hope it is still readable.

  • 1. CMRR=120

    2. CMRR(dB) = 20*log(1/t) => 20*log(0.1/100) =>20*log(1000) which is 60dB

    3. 20* log(1/t) => which is 20*2 => 40dB

    4. Input resistance by v2 will be r3+r4=2kohm

    5. Input resistance by v1 will be When V1 and v2  are equal and opposite in phase, this feedback can reduce the effective impedance at V1, making it less than 1kohm

    6. Mismatch in input impedance cause the input frequncy to differ  which may affect the signal fidelity especially in ac couploed. 

  • So, if V1, 5V generates a current of 7.5mA in R1, what is the value of R1 by Ohm's Law?  Spooky, huh?

  • It's interesting to simulate this problem, both to calculate the CMRR = 20*log | Adiff / Acm | and the apparent value of R1 with respect to V1.

  • Remember that we have a virtual ground at a pin only if the other Vin pin is at ground level. It is not our case. The closed loop to consider is:
    ground, (V1=5), R1, R2, (Vout = -10V), ground.
    That loop is complet without leak if the same current passes through R1 and R2, which holds if the OpAmp doesn't capture any current (or a negligible current). So the current of 7.5 mA passes through R1 in series with R2 dropping a total of 15 Volt (even if V1 supplies only 5 volt).