At Analog Devices, we recognize that our products are just one part of the design solution. We are supporting seamless integration of ecosystems and tools by offering HDL interface code, device drivers, and reference project examples for FPGA connectivity. This community is for the discussion of these reference designs.
If you have issues with one of our reference designs always specify the used HDL branch and software branch (no-OS or Linux), also the used development tool version (Vivado or Quartus). Try to describe your issue as detailed as you can, answering at least the following couple of questions: what did you try to do? what did you expect? what did you get?