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Xilinx Zynq-7020 interface high speed ADC AD9278&AD9670

Hello All,

Please help for my question about Xilinx Zynq-7020 interfacing AD9278 (12 bit, 8-channel, up to 65MSPS) or AD9670 (14 bit, 8-channel, up to 80MSPS).

1) Is Zynq-7020 (Artix-FPGA Fabric) able to interface and sample AD9278 or AD9670 8-channel data at 50MSPS?

2) If the answer to question 1) is yes, please help for possible instructions how to implement it. What are the maximum channels for Zynq-7020 (Artix-FPGA Fabric) to support at 50MSPS? like 16, 32 channels possibly?

Appreciate any help. Thank you.

Linda

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  • Hello rejeesh,

    Thank you a lot. I will try to follow the clues and suggestions.

    If I didn't misunderstand, I still need to use the FMC interposer as the connection of Zedboard and AD9279 or AD9670 evaluation board, which is correct? If I fix the clock setup issue, can I sample all 8 channels ADC data at 50MS/S? Can I increase the number of ADC channels up to 16 or 32 by different connector or connection solution?

    Appreciate your help.

    Linda

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  • Hello rejeesh,

    Thank you a lot. I will try to follow the clues and suggestions.

    If I didn't misunderstand, I still need to use the FMC interposer as the connection of Zedboard and AD9279 or AD9670 evaluation board, which is correct? If I fix the clock setup issue, can I sample all 8 channels ADC data at 50MS/S? Can I increase the number of ADC channels up to 16 or 32 by different connector or connection solution?

    Appreciate your help.

    Linda

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