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AD9631 for custom design with zynq - xilinx

Hi Everyone,

I am using AD9631 for one of our project, my design flow are as follows, 

ADC part

1) Driving analog signal from outside through SMA connector.

2) An RF transformer to convert single ended to differential signal.

3) Driving this differential signal through ADC differential amplifier.

4) Output from differential amplifier is fed to ADC through an Anti-Aliasing filter,

     which is designed for 3GHz , 3rd order bandpass butterworth filter.

5) Finally reaching out ADC receive pins.

DAC part

1) Output from DAC pins are fed to RF transformer.

2) Output of transformer is fed to, Matching Balun then to SMA  connector.

My question is does this design meets our requirement if it is used as custom high speed data acquisition board with Xilinx Zynq.

Thanks & Regards

J. K. Ranjan

Hardware Engineer

  • Hello Ranjan,

    Can you give some additional details to fully understand the question ?

    What are your requirements ? You are asking if you can integrate the ADC path and DAC path on a custom acquisition board ?

    We have the FMCOMMS2 board (AD9361 based daughter card), high speed acquisition board which is connected to different Zynq based development boards. You are asking if you can create something similar ?

    Regards,

    Adrian

  • Hi Adrain,

    Thanks replying for my request,

    Actually we are using AD9364 in our board with zynq as BBP, somewhere i read in AD website that only difference in AD9364 and AD9361 is the number of channels present in it for receiving as well as transmitting part.

    Hence the design is for custom requirement we are not supposed to use any of the evaluation boards. All the design should be present in 1 single board only, here are my requirements and followed design in our custom board.

    1) Acquisition of analog frequency from 70MHz to 2.5GHz and for restricting all other frequencies above 2.5GHz we have used Balun and Line Transformer of 2.5GHz maximum allowed frequency.

    2) By using differential amplifier ADL5565 signal is fed to anti aliasing filter which is driven by LC combination to attain more accuracy.

    3) While transmitting part from DAC we need more accuracy in transmitting particular exact frequency, for this i need help how to use decimation functions to program into AD9364.

    4) Regarding clock frequency do we need to use any clock Generator / synthesizer for giving input clock frequency for AD9364, as we should be able to sample higher frequencies up-to 2.5GHz , or is it possible to program this also within AD9364 using BB PLL and VCO present inside and in which clock is fed by crystal/external input.

    These are our requirements and design followed now, please guide us on hardware design part if any wrong has been followed as above said design.

    I also need some guidelines on generating HDL from matlab app provided in website and achieving our design.

     

    Thanks & Regards

    J. K. Ranjan

    Hardware Engineer

  • Our FMCOMMS2 / FMCOMMS3 / FMCOMMS4 meet all the requirements so it should be feasible to implement your design either as a standalone board with the FPGA on it or as two boards connected through an FMC connector as long as you follow all the guidelines when designing for frequencies of 3GHz and designing with FPGAs.  You can even use our schematics as starting point for the ADC / DAC paths.