Hi,
When testing ADAQ23878-EVAL with the onboard +2P5V output from ADP7118, the voltages I get are quite noisy.
Sampling rate is fixed at 8.33MSps, generated by the onboard ADC_PLL_CNV by configuring AD9513 (this is the max I could get and still get consistent test pattern without errors), and range is ±5V (gain 0.37).
The ADP7118 datasheet states 11uVRMS, plus (from ADAQ23878 datasheet) 77uVRMS noise for 0.37 gain, which summed is about 78.6uVRMS. Going back to peak values, that is about 2*111uVp = 222uVpp noise.
I transfer a new sample from ADC to DDR using DMA every 100ms or so.
The problem is I'm seeing on average 4mVpp noise (calculated from successive samples).
Would enabling the onboard ADA4899 improve this?
Is there any other recommendation (if filtering, I need 1MHz BW)?
I have attached a plot from the samples (with mean subtracted), the data collected, Vitis project code and a python script to do the plot.
Also verified that test pattern is correct (as can be seen in the attached files) so it should be getting the right adc codes.
Edit Notes
added LDO[edited by: bleudoutremer at 1:00 AM (GMT -4) on 1 Oct 2025]
