ADV7511 on custom board not working

Hi,

  In order to navigate the white screen issue, could you please configure the below registers when initially bringing up the ADV7511 HDMI transmitter at Generated by RMapGen (Page 14).

Thanks,

Poornima 

Hi, 

 Strangely enough, but I made some minor modifications to the device tree, or re-generated the bitstream file to synthesize BOOT.BIN. After the initial loading, I would encounter the phenomenon of a white screen on the HDMI output. However, when I restarted the Zynq Linux system after a day, without any modification in the process, it would turn into a gray screen phenomenon. Meanwhile, just now when I started the system, I found that the output was unstable as well, and it would flash a green screen. The specific output is shown in the video.

Regarding the configuration of the registers for the adv7511 in i2c, it should have been done by the Linux driver. When I scanned the i2c bus connected to the adv7511, all of them were occupied.

root@analog:~# i2cdetect -y 2
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f
00:                         -- -- -- -- -- -- -- --
10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
30: -- -- -- -- -- -- -- -- UU UU -- -- UU -- -- UU
40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
70: -- -- -- -- -- -- -- --
root@analog:~# cat /proc/interrupts
           CPU0       CPU1
 24:          1          0     GIC-0  27 Edge      gt
 25:          0          0     GIC-0  43 Level     ttc_clockevent
 26:     129971     149295     GIC-0  29 Edge      twd
 27:          0          0     GIC-0  37 Level     arm-pmu
 28:          0          0     GIC-0  38 Level     arm-pmu
 29:         43          0     GIC-0  39 Level     f8007100.adc
 31:       2818          0     GIC-0  57 Level     cdns-i2c
 33:          0          0     GIC-0  35 Level     f800c000.ocmc
 34:        701          0     GIC-0  59 Level     xuartps
 35:       3839          0     GIC-0  58 Level     e0006000.spi
 36:      18233          0     GIC-0  51 Level     e000d000.spi
 37:          0          0     GIC-0  54 Level     eth0
 38:      82220          0     GIC-0  56 Level     mmc0
 39:        643          0     GIC-0  79 Level     mmc1
 40:          0          0     GIC-0  45 Level     f8003000.dmac
 41:          0          0     GIC-0  46 Level     f8003000.dmac
 42:          0          0     GIC-0  47 Level     f8003000.dmac
 43:          0          0     GIC-0  48 Level     f8003000.dmac
 44:          0          0     GIC-0  49 Level     f8003000.dmac
 45:          0          0     GIC-0  72 Level     f8003000.dmac
 46:          0          0     GIC-0  73 Level     f8003000.dmac
 47:          0          0     GIC-0  74 Level     f8003000.dmac
 48:          0          0     GIC-0  75 Level     f8003000.dmac
 49:          0          0     GIC-0  40 Level     f8007000.devcfg
 55:          0          0     GIC-0  53 Level     e0002000.usb
 56:          0          0     GIC-0  41 Edge      f8005000.watchdog
 57:         24          0     GIC-0  87 Level     41620000.i2c
 58:          0          0     GIC-0  89 Level     7c400000.dma
 59:          0          0     GIC-0  88 Level     7c420000.dma
 60:      16651          0     GIC-0  90 Level     41600000.i2c
 61:          0          0     GIC-0  91 Level     43000000.dma
IPI0:          0          0  CPU wakeup interrupts
IPI1:          0          0  Timer broadcast interrupts
IPI2:     137982     179305  Rescheduling interrupts
IPI3:       5847       8061  Function call interrupts
IPI4:          0          0  CPU stop interrupts
IPI5:          0          0  IRQ work interrupts
IPI6:          0          0  completion interrupts
Err:          0

Hi,

  Did you refer this link ADV7511 HDMI transmitter Linux Driver [Analog Devices Wiki]

Thanks,

Poornima

Hi，actually I refer the link https://wiki.analog.com/resources/tools-software/linux-build/generic/zynq.

I used the linux kernel from the 2021_R1 branch on GitHub. It is supposed to include the linux driver for the adv7511.

In fact, I deleted the SPDIF-related content of adv7511. I removed the SPDIF_TX related IP cores from the HDL project, and only retained the HDMI_TX part. That is, I only need the video output of HDMI and do not need the sound output. Will this affect the configuration of the Linux driver? Meanwhile, I found in the Linux system that HDMI_DMA was not enabled, and the interrupt count remained 0 all the time. I suspect whether it is because some registers need to be configured before enabling DMA, and some register configurations failed. Because I saw that the interrupt count of I2C was constantly increasing.

This is the schematic diagram of the part related to adv7511 in the development board.

Then this is the entire content of the dts file that I obtained by decompiling the dtb file.

/dts-v1/;

/ {
	#address-cells = <0x01>;
	#size-cells = <0x01>;
	compatible = "xlnx,zynq-7000";
	model = "Xilinx Zynq RK_Z7100";

	cpus {
		#address-cells = <0x01>;
		#size-cells = <0x00>;

		cpu@0 {
			compatible = "arm,cortex-a9";
			device_type = "cpu";
			reg = <0x00>;
			clocks = <0x01 0x03>;
			clock-latency = <0x3e8>;
			cpu0-supply = <0x02>;
			operating-points = <0xc3500 0xf4240 0x61a80 0xf4240 0x30d40 0xf4240>;
			phandle = <0x11>;
		};

		cpu@1 {
			compatible = "arm,cortex-a9";
			device_type = "cpu";
			reg = <0x01>;
			clocks = <0x01 0x03>;
			phandle = <0x13>;
		};
	};

	fpga-full {
		compatible = "fpga-region";
		fpga-mgr = <0x03>;
		#address-cells = <0x01>;
		#size-cells = <0x01>;
		ranges;
		phandle = <0x1d>;
	};

	pmu@f8891000 {
		compatible = "arm,cortex-a9-pmu";
		interrupts = <0x00 0x05 0x04 0x00 0x06 0x04>;
		interrupt-parent = <0x04>;
		reg = <0xf8891000 0x1000 0xf8893000 0x1000>;
	};

	fixedregulator {
		compatible = "regulator-fixed";
		regulator-name = "VCCPINT";
		regulator-min-microvolt = <0xf4240>;
		regulator-max-microvolt = <0xf4240>;
		regulator-boot-on;
		regulator-always-on;
		phandle = <0x02>;
	};

	replicator {
		compatible = "arm,coresight-static-replicator";
		clocks = <0x01 0x1b 0x01 0x2e 0x01 0x2f>;
		clock-names = "apb_pclk\0dbg_trc\0dbg_apb";

		out-ports {
			#address-cells = <0x01>;
			#size-cells = <0x00>;

			port@0 {
				reg = <0x00>;

				endpoint {
					remote-endpoint = <0x05>;
					phandle = <0x0d>;
				};
			};

			port@1 {
				reg = <0x01>;

				endpoint {
					remote-endpoint = <0x06>;
					phandle = <0x0c>;
				};
			};
		};

		in-ports {

			port {

				endpoint {
					remote-endpoint = <0x07>;
					phandle = <0x0e>;
				};
			};
		};
	};

	axi {
		u-boot,dm-pre-reloc;
		compatible = "simple-bus";
		#address-cells = <0x01>;
		#size-cells = <0x01>;
		interrupt-parent = <0x04>;
		ranges;
		phandle = <0x1e>;

		adc@f8007100 {
			compatible = "xlnx,zynq-xadc-1.00.a";
			reg = <0xf8007100 0x20>;
			interrupts = <0x00 0x07 0x04>;
			interrupt-parent = <0x04>;
			clocks = <0x01 0x0c>;
			phandle = <0x1f>;
		};

		can@e0008000 {
			compatible = "xlnx,zynq-can-1.0";
			status = "disabled";
			clocks = <0x01 0x13 0x01 0x24>;
			clock-names = "can_clk\0pclk";
			reg = <0xe0008000 0x1000>;
			interrupts = <0x00 0x1c 0x04>;
			interrupt-parent = <0x04>;
			tx-fifo-depth = <0x40>;
			rx-fifo-depth = <0x40>;
			phandle = <0x20>;
		};

		can@e0009000 {
			compatible = "xlnx,zynq-can-1.0";
			status = "disabled";
			clocks = <0x01 0x14 0x01 0x25>;
			clock-names = "can_clk\0pclk";
			reg = <0xe0009000 0x1000>;
			interrupts = <0x00 0x33 0x04>;
			interrupt-parent = <0x04>;
			tx-fifo-depth = <0x40>;
			rx-fifo-depth = <0x40>;
			phandle = <0x21>;
		};

		gpio@e000a000 {
			compatible = "xlnx,zynq-gpio-1.0";
			#gpio-cells = <0x02>;
			clocks = <0x01 0x2a>;
			gpio-controller;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			interrupt-parent = <0x04>;
			interrupts = <0x00 0x14 0x04>;
			reg = <0xe000a000 0x1000>;
			emio-gpio-width = <0x40>;
			gpio-mask-high = <0x00>;
			gpio-mask-low = <0x5600>;
			phandle = <0x09>;
		};

		i2c@e0004000 {
			compatible = "cdns,i2c-r1p10";
			status = "okay";
			clocks = <0x01 0x26>;
			interrupt-parent = <0x04>;
			interrupts = <0x00 0x19 0x04>;
			reg = <0xe0004000 0x1000>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			clock-frequency = <0x186a0>;
			phandle = <0x22>;

			eeprom1@50 {
				compatible = "atmel,24c256";
				reg = <0x50>;
				pagesize = <0x20>;
			};
		};

		i2c@e0005000 {
			compatible = "cdns,i2c-r1p10";
			status = "disabled";
			clocks = <0x01 0x27>;
			interrupt-parent = <0x04>;
			interrupts = <0x00 0x30 0x04>;
			reg = <0xe0005000 0x1000>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			phandle = <0x23>;
		};

		interrupt-controller@f8f01000 {
			compatible = "arm,cortex-a9-gic";
			#interrupt-cells = <0x03>;
			interrupt-controller;
			reg = <0xf8f01000 0x1000 0xf8f00100 0x100>;
			num_cpus = <0x02>;
			num_interrupts = <0x60>;
			phandle = <0x04>;
		};

		cache-controller@f8f02000 {
			compatible = "arm,pl310-cache";
			reg = <0xf8f02000 0x1000>;
			interrupts = <0x00 0x02 0x04>;
			arm,data-latency = <0x03 0x02 0x02>;
			arm,tag-latency = <0x02 0x02 0x02>;
			cache-unified;
			cache-level = <0x02>;
			phandle = <0x24>;
		};

		memory-controller@f8006000 {
			compatible = "xlnx,zynq-ddrc-a05";
			reg = <0xf8006000 0x1000>;
			phandle = <0x25>;
		};

		ocmc@f800c000 {
			compatible = "xlnx,zynq-ocmc-1.0";
			interrupt-parent = <0x04>;
			interrupts = <0x00 0x03 0x04>;
			reg = <0xf800c000 0x1000>;
			phandle = <0x26>;
		};

		serial@e0000000 {
			compatible = "xlnx,xuartps\0cdns,uart-r1p8";
			status = "okay";
			clocks = <0x01 0x17 0x01 0x28>;
			clock-names = "uart_clk\0pclk";
			reg = <0xe0000000 0x1000>;
			interrupts = <0x00 0x1b 0x04>;
			cts-override;
			device_type = "serial";
			port-number = <0x00>;
			phandle = <0x27>;
		};

		serial@e0001000 {
			compatible = "xlnx,xuartps\0cdns,uart-r1p8";
			status = "disabled";
			clocks = <0x01 0x18 0x01 0x29>;
			clock-names = "uart_clk\0pclk";
			reg = <0xe0001000 0x1000>;
			interrupts = <0x00 0x32 0x04>;
			phandle = <0x28>;
		};

		spi@e0006000 {
			compatible = "xlnx,zynq-spi-r1p6";
			reg = <0xe0006000 0x1000>;
			status = "okay";
			interrupt-parent = <0x04>;
			interrupts = <0x00 0x1a 0x04>;
			clocks = <0x01 0x19 0x01 0x22>;
			clock-names = "ref_clk\0pclk";
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			is-decoded-cs = <0x00>;
			num-cs = <0x03>;
			phandle = <0x29>;

			ad9361-phy@0 {
				compatible = "adi,ad9361";
				reg = <0x00>;
				spi-cpha;
				spi-max-frequency = <0x989680>;
				clocks = <0x08 0x00>;
				clock-names = "ad9361_ext_refclk";
				clock-output-names = "rx_sampl_clk\0tx_sampl_clk";
				#clock-cells = <0x01>;
				adi,digital-interface-tune-skip-mode = <0x00>;
				adi,pp-tx-swap-enable;
				adi,pp-rx-swap-enable;
				adi,rx-frame-pulse-mode-enable;
				adi,lvds-mode-enable;
				adi,lvds-bias-mV = <0x96>;
				adi,lvds-rx-onchip-termination-enable;
				adi,rx-data-delay = <0x04>;
				adi,tx-fb-clock-delay = <0x07>;
				adi,dcxo-coarse-and-fine-tune = <0x08 0x1720>;
				adi,2rx-2tx-mode-enable;
				adi,frequency-division-duplex-mode-enable;
				adi,rx-rf-port-input-select = <0x00>;
				adi,tx-rf-port-input-select = <0x00>;
				adi,tx-attenuation-mdB = <0x2710>;
				adi,tx-lo-powerdown-managed-enable;
				adi,rf-rx-bandwidth-hz = <0x112a880>;
				adi,rf-tx-bandwidth-hz = <0x112a880>;
				adi,rx-synthesizer-frequency-hz = <0x00 0x8f0d1800>;
				adi,tx-synthesizer-frequency-hz = <0x00 0x92080880>;
				adi,rx-path-clock-frequencies = <0x3a980000 0xea60000 0x7530000 0x3a98000 0x1d4c000 0x1d4c000>;
				adi,tx-path-clock-frequencies = <0x3a980000 0x7530000 0x7530000 0x3a98000 0x1d4c000 0x1d4c000>;
				adi,gc-rx1-mode = <0x02>;
				adi,gc-rx2-mode = <0x02>;
				adi,gc-adc-ovr-sample-size = <0x04>;
				adi,gc-adc-small-overload-thresh = <0x2f>;
				adi,gc-adc-large-overload-thresh = <0x3a>;
				adi,gc-lmt-overload-high-thresh = <0x320>;
				adi,gc-lmt-overload-low-thresh = <0x2c0>;
				adi,gc-dec-pow-measurement-duration = <0x2000>;
				adi,gc-low-power-thresh = <0x18>;
				adi,mgc-inc-gain-step = <0x02>;
				adi,mgc-dec-gain-step = <0x02>;
				adi,mgc-split-table-ctrl-inp-gain-mode = <0x00>;
				adi,agc-attack-delay-extra-margin-us = <0x01>;
				adi,agc-outer-thresh-high = <0x05>;
				adi,agc-outer-thresh-high-dec-steps = <0x02>;
				adi,agc-inner-thresh-high = <0x0a>;
				adi,agc-inner-thresh-high-dec-steps = <0x01>;
				adi,agc-inner-thresh-low = <0x0c>;
				adi,agc-inner-thresh-low-inc-steps = <0x01>;
				adi,agc-outer-thresh-low = <0x12>;
				adi,agc-outer-thresh-low-inc-steps = <0x02>;
				adi,agc-adc-small-overload-exceed-counter = <0x0a>;
				adi,agc-adc-large-overload-exceed-counter = <0x0a>;
				adi,agc-adc-large-overload-inc-steps = <0x02>;
				adi,agc-lmt-overload-large-exceed-counter = <0x0a>;
				adi,agc-lmt-overload-small-exceed-counter = <0x0a>;
				adi,agc-lmt-overload-large-inc-steps = <0x02>;
				adi,agc-gain-update-interval-us = <0x3e8>;
				adi,fagc-dec-pow-measurement-duration = <0x40>;
				adi,fagc-lp-thresh-increment-steps = <0x01>;
				adi,fagc-lp-thresh-increment-time = <0x05>;
				adi,fagc-energy-lost-stronger-sig-gain-lock-exit-cnt = <0x08>;
				adi,fagc-final-overrange-count = <0x03>;
				adi,fagc-gain-index-type-after-exit-rx-mode = <0x00>;
				adi,fagc-lmt-final-settling-steps = <0x01>;
				adi,fagc-lock-level = <0x0a>;
				adi,fagc-lock-level-gain-increase-upper-limit = <0x05>;
				adi,fagc-lock-level-lmt-gain-increase-enable;
				adi,fagc-lpf-final-settling-steps = <0x01>;
				adi,fagc-optimized-gain-offset = <0x05>;
				adi,fagc-power-measurement-duration-in-state5 = <0x40>;
				adi,fagc-rst-gla-engergy-lost-goto-optim-gain-enable;
				adi,fagc-rst-gla-engergy-lost-sig-thresh-below-ll = <0x0a>;
				adi,fagc-rst-gla-engergy-lost-sig-thresh-exceeded-enable;
				adi,fagc-rst-gla-if-en-agc-pulled-high-mode = <0x00>;
				adi,fagc-rst-gla-large-adc-overload-enable;
				adi,fagc-rst-gla-large-lmt-overload-enable;
				adi,fagc-rst-gla-stronger-sig-thresh-above-ll = <0x0a>;
				adi,fagc-rst-gla-stronger-sig-thresh-exceeded-enable;
				adi,fagc-state-wait-time-ns = <0x104>;
				adi,fagc-use-last-lock-level-for-set-gain-enable;
				adi,rssi-restart-mode = <0x03>;
				adi,rssi-delay = <0x01>;
				adi,rssi-wait = <0x01>;
				adi,rssi-duration = <0x3e8>;
				adi,ctrl-outs-index = <0x00>;
				adi,ctrl-outs-enable-mask = <0xff>;
				adi,temp-sense-measurement-interval-ms = <0x3e8>;
				adi,temp-sense-offset-signed = <0xce>;
				adi,temp-sense-periodic-measurement-enable;
				adi,aux-dac-manual-mode-enable;
				adi,aux-dac1-default-value-mV = <0x00>;
				adi,aux-dac1-rx-delay-us = <0x00>;
				adi,aux-dac1-tx-delay-us = <0x00>;
				adi,aux-dac2-default-value-mV = <0x00>;
				adi,aux-dac2-rx-delay-us = <0x00>;
				adi,aux-dac2-tx-delay-us = <0x00>;
				en_agc-gpios = <0x09 0x62 0x00>;
				sync-gpios = <0x09 0x63 0x00>;
				reset-gpios = <0x09 0x64 0x00>;
				enable-gpios = <0x09 0x65 0x00>;
				txnrx-gpios = <0x09 0x66 0x00>;
				phandle = <0x16>;
			};
		};

		spi@e0007000 {
			compatible = "xlnx,zynq-spi-r1p6";
			reg = <0xe0007000 0x1000>;
			status = "disabled";
			interrupt-parent = <0x04>;
			interrupts = <0x00 0x31 0x04>;
			clocks = <0x01 0x1a 0x01 0x23>;
			clock-names = "ref_clk\0pclk";
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			phandle = <0x2a>;
		};

		spi@e000d000 {
			clock-names = "ref_clk\0pclk";
			clocks = <0x01 0x0a 0x01 0x2b>;
			compatible = "xlnx,zynq-qspi-1.0";
			status = "okay";
			interrupt-parent = <0x04>;
			interrupts = <0x00 0x13 0x04>;
			reg = <0xe000d000 0x1000>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			is-dual = <0x01>;
			num-cs = <0x02>;
			spi-rx-bus-width = <0x08>;
			spi-tx-bus-width = <0x08>;
			phandle = <0x2b>;

			flash@0 {
				phandle = <0x2c>;
				reg = <0x00>;
				#address-cells = <0x01>;
				#size-cells = <0x01>;
				compatible = "w25q256\0jedec,spi-nor";
				spi-tx-bus-width = <0x01>;
				spi-rx-bus-width = <0x04>;
				spi-max-frequency = <0x2faf080>;
				parallel-memories = <0x00 0x2000000 0x00 0x2000000>;

				partition@0 {
					label = "boot";
					reg = <0x00 0x500000>;
				};

				partition@1 {
					label = "bootenv";
					reg = <0x500000 0x20000>;
				};

				partition@2 {
					label = "kernel";
					reg = <0x520000 0xa80000>;
				};

				partition@3 {
					label = "spare";
					reg = <0xfa0000 0x00>;
				};
			};
		};

		memory-controller@e000e000 {
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			status = "disabled";
			clock-names = "memclk\0apb_pclk";
			clocks = <0x01 0x0b 0x01 0x2c>;
			compatible = "arm,pl353-smc-r2p1\0arm,primecell";
			interrupt-parent = <0x04>;
			interrupts = <0x00 0x12 0x04>;
			ranges;
			reg = <0xe000e000 0x1000>;
			phandle = <0x2d>;

			flash@e1000000 {
				status = "disabled";
				compatible = "arm,pl353-nand-r2p1";
				reg = <0xe1000000 0x1000000>;
				#address-cells = <0x01>;
				#size-cells = <0x01>;
				phandle = <0x2e>;
			};

			flash@e2000000 {
				status = "disabled";
				compatible = "cfi-flash";
				reg = <0xe2000000 0x2000000>;
				#address-cells = <0x01>;
				#size-cells = <0x01>;
				phandle = <0x2f>;
			};
		};

		ethernet@e000b000 {
			compatible = "cdns,zynq-gem\0cdns,gem";
			reg = <0xe000b000 0x1000>;
			status = "okay";
			interrupts = <0x00 0x16 0x04>;
			clocks = <0x01 0x1e 0x01 0x1e 0x01 0x0d>;
			clock-names = "pclk\0hclk\0tx_clk";
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			phy-mode = "rgmii-id";
			xlnx,ptp-enet-clock = <0x7f28150>;
			local-mac-address = [00 0a 35 00 1e 53];
			phandle = <0x30>;
		};

		ethernet@e000c000 {
			compatible = "cdns,zynq-gem\0cdns,gem";
			reg = <0xe000c000 0x1000>;
			status = "disabled";
			interrupts = <0x00 0x2d 0x04>;
			clocks = <0x01 0x1f 0x01 0x1f 0x01 0x0e>;
			clock-names = "pclk\0hclk\0tx_clk";
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			phandle = <0x31>;
		};

		mmc@e0100000 {
			compatible = "arasan,sdhci-8.9a";
			status = "okay";
			clock-names = "clk_xin\0clk_ahb";
			clocks = <0x01 0x15 0x01 0x20>;
			interrupt-parent = <0x04>;
			interrupts = <0x00 0x18 0x04>;
			reg = <0xe0100000 0x1000>;
			xlnx,has-cd = <0x00>;
			xlnx,has-power = <0x00>;
			xlnx,has-wp = <0x00>;
			phandle = <0x32>;
		};

		mmc@e0101000 {
			compatible = "arasan,sdhci-8.9a";
			status = "okay";
			clock-names = "clk_xin\0clk_ahb";
			clocks = <0x01 0x16 0x01 0x21>;
			interrupt-parent = <0x04>;
			interrupts = <0x00 0x2f 0x04>;
			reg = <0xe0101000 0x1000>;
			xlnx,has-cd = <0x00>;
			xlnx,has-power = <0x00>;
			xlnx,has-wp = <0x00>;
			phandle = <0x33>;
		};

		slcr@f8000000 {
			u-boot,dm-pre-reloc;
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			compatible = "xlnx,zynq-slcr\0syscon\0simple-mfd";
			reg = <0xf8000000 0x1000>;
			ranges;
			phandle = <0x0a>;

			clkc@100 {
				u-boot,dm-pre-reloc;
				#clock-cells = <0x01>;
				compatible = "xlnx,ps7-clkc";
				fclk-enable = <0x03>;
				clock-output-names = "armpll\0ddrpll\0iopll\0cpu_6or4x\0cpu_3or2x\0cpu_2x\0cpu_1x\0ddr2x\0ddr3x\0dci\0lqspi\0smc\0pcap\0gem0\0gem1\0fclk0\0fclk1\0fclk2\0fclk3\0can0\0can1\0sdio0\0sdio1\0uart0\0uart1\0spi0\0spi1\0dma\0usb0_aper\0usb1_aper\0gem0_aper\0gem1_aper\0sdio0_aper\0sdio1_aper\0spi0_aper\0spi1_aper\0can0_aper\0can1_aper\0i2c0_aper\0i2c1_aper\0uart0_aper\0uart1_aper\0gpio_aper\0lqspi_aper\0smc_aper\0swdt\0dbg_trc\0dbg_apb";
				reg = <0x100 0x100>;
				ps-clk-frequency = <0x1fca055>;
				phandle = <0x01>;
			};

			rstc@200 {
				compatible = "xlnx,zynq-reset";
				reg = <0x200 0x48>;
				#reset-cells = <0x01>;
				syscon = <0x0a>;
				phandle = <0x34>;
			};

			pinctrl@700 {
				compatible = "xlnx,pinctrl-zynq";
				reg = <0x700 0x200>;
				syscon = <0x0a>;
				phandle = <0x35>;
			};
		};

		dmac@f8003000 {
			compatible = "arm,pl330\0arm,primecell";
			reg = <0xf8003000 0x1000>;
			interrupt-parent = <0x04>;
			interrupt-names = "abort\0dma0\0dma1\0dma2\0dma3\0dma4\0dma5\0dma6\0dma7";
			interrupts = <0x00 0x0d 0x04 0x00 0x0e 0x04 0x00 0x0f 0x04 0x00 0x10 0x04 0x00 0x11 0x04 0x00 0x28 0x04 0x00 0x29 0x04 0x00 0x2a 0x04 0x00 0x2b 0x04>;
			#dma-cells = <0x01>;
			#dma-channels = <0x08>;
			#dma-requests = <0x04>;
			clocks = <0x01 0x1b>;
			clock-names = "apb_pclk";
			phandle = <0x36>;
		};

		devcfg@f8007000 {
			compatible = "xlnx,zynq-devcfg-1.0";
			interrupt-parent = <0x04>;
			interrupts = <0x00 0x08 0x04>;
			reg = <0xf8007000 0x100>;
			clocks = <0x01 0x0c 0x01 0x0f 0x01 0x10 0x01 0x11 0x01 0x12>;
			clock-names = "ref_clk\0fclk0\0fclk1\0fclk2\0fclk3";
			syscon = <0x0a>;
			phandle = <0x03>;
		};

		efuse@f800d000 {
			compatible = "xlnx,zynq-efuse";
			reg = <0xf800d000 0x20>;
			phandle = <0x37>;
		};

		timer@f8f00200 {
			compatible = "arm,cortex-a9-global-timer";
			reg = <0xf8f00200 0x20>;
			interrupts = <0x01 0x0b 0x301>;
			interrupt-parent = <0x04>;
			clocks = <0x01 0x04>;
			phandle = <0x38>;
		};

		timer@f8001000 {
			interrupt-parent = <0x04>;
			interrupts = <0x00 0x0a 0x04 0x00 0x0b 0x04 0x00 0x0c 0x04>;
			compatible = "cdns,ttc";
			clocks = <0x01 0x06>;
			reg = <0xf8001000 0x1000>;
			phandle = <0x39>;
		};

		timer@f8002000 {
			interrupt-parent = <0x04>;
			interrupts = <0x00 0x25 0x04 0x00 0x26 0x04 0x00 0x27 0x04>;
			compatible = "cdns,ttc";
			clocks = <0x01 0x06>;
			reg = <0xf8002000 0x1000>;
			phandle = <0x3a>;
		};

		timer@f8f00600 {
			interrupt-parent = <0x04>;
			interrupts = <0x01 0x0d 0x301>;
			compatible = "arm,cortex-a9-twd-timer";
			reg = <0xf8f00600 0x20>;
			clocks = <0x01 0x04>;
			phandle = <0x3b>;
		};

		usb@e0002000 {
			compatible = "xlnx,zynq-usb-2.20a\0chipidea,usb2";
			status = "okay";
			clocks = <0x01 0x1c>;
			interrupt-parent = <0x04>;
			interrupts = <0x00 0x15 0x04>;
			reg = <0xe0002000 0x1000>;
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			phandle = <0x3c>;
			phy_type = "ulpi";
			usb-reset = <0x09 0x07 0x00>;
			dr_mode = "host";

			usb_phy {
				compatible = "ulpi-phy";
				#phy-cells = <0x00>;
				reg = <0xe0002000 0x1000>;
				view-port = <0x170>;
				drv-vbus;
			};
		};

		usb@e0003000 {
			compatible = "xlnx,zynq-usb-2.20a\0chipidea,usb2";
			status = "disabled";
			clocks = <0x01 0x1d>;
			interrupt-parent = <0x04>;
			interrupts = <0x00 0x2c 0x04>;
			reg = <0xe0003000 0x1000>;
			phy_type = "ulpi";
			phandle = <0x3d>;
		};

		watchdog@f8005000 {
			clocks = <0x01 0x2d>;
			compatible = "cdns,wdt-r1p2";
			interrupt-parent = <0x04>;
			interrupts = <0x00 0x09 0x01>;
			reg = <0xf8005000 0x1000>;
			timeout-sec = <0x0a>;
			phandle = <0x3e>;
		};

		etb@f8801000 {
			compatible = "arm,coresight-etb10\0arm,primecell";
			reg = <0xf8801000 0x1000>;
			clocks = <0x01 0x1b 0x01 0x2e 0x01 0x2f>;
			clock-names = "apb_pclk\0dbg_trc\0dbg_apb";

			in-ports {

				port {

					endpoint {
						remote-endpoint = <0x0c>;
						phandle = <0x06>;
					};
				};
			};
		};

		tpiu@f8803000 {
			compatible = "arm,coresight-tpiu\0arm,primecell";
			reg = <0xf8803000 0x1000>;
			clocks = <0x01 0x1b 0x01 0x2e 0x01 0x2f>;
			clock-names = "apb_pclk\0dbg_trc\0dbg_apb";

			in-ports {

				port {

					endpoint {
						remote-endpoint = <0x0d>;
						phandle = <0x05>;
					};
				};
			};
		};

		funnel@f8804000 {
			compatible = "arm,coresight-static-funnel\0arm,primecell";
			reg = <0xf8804000 0x1000>;
			clocks = <0x01 0x1b 0x01 0x2e 0x01 0x2f>;
			clock-names = "apb_pclk\0dbg_trc\0dbg_apb";

			out-ports {

				port {

					endpoint {
						remote-endpoint = <0x0e>;
						phandle = <0x07>;
					};
				};
			};

			in-ports {
				#address-cells = <0x01>;
				#size-cells = <0x00>;

				port@0 {
					reg = <0x00>;

					endpoint {
						remote-endpoint = <0x0f>;
						phandle = <0x12>;
					};
				};

				port@1 {
					reg = <0x01>;

					endpoint {
						remote-endpoint = <0x10>;
						phandle = <0x14>;
					};
				};

				port@2 {
					reg = <0x02>;

					endpoint {
						phandle = <0x3f>;
					};
				};
			};
		};

		ptm@f889c000 {
			compatible = "arm,coresight-etm3x\0arm,primecell";
			reg = <0xf889c000 0x1000>;
			clocks = <0x01 0x1b 0x01 0x2e 0x01 0x2f>;
			clock-names = "apb_pclk\0dbg_trc\0dbg_apb";
			cpu = <0x11>;

			out-ports {

				port {

					endpoint {
						remote-endpoint = <0x12>;
						phandle = <0x0f>;
					};
				};
			};
		};

		ptm@f889d000 {
			compatible = "arm,coresight-etm3x\0arm,primecell";
			reg = <0xf889d000 0x1000>;
			clocks = <0x01 0x1b 0x01 0x2e 0x01 0x2f>;
			clock-names = "apb_pclk\0dbg_trc\0dbg_apb";
			cpu = <0x13>;

			out-ports {

				port {

					endpoint {
						remote-endpoint = <0x14>;
						phandle = <0x10>;
					};
				};
			};
		};
	};

	chosen {
		bootargs = "console=ttyPS0,115200 earlycon root=/dev/mmcblk0p2 rw rootwait";
		stdout-path = "serial0:115200n8";
	};

	aliases {
		ethernet0 = "/axi/ethernet@e000b000";
		serial0 = "/axi/serial@e0000000";
	};

	memory {
		device_type = "memory";
		reg = <0x00 0x40000000>;
	};

	leds {
		compatible = "gpio-leds";

		led0 {
			label = "pl_led1";
			gpios = <0x09 0x36 0x00>;
			default-state = "on";
		};

		led1 {
			label = "pl_led2";
			gpios = <0x09 0x37 0x00>;
			default-state = "on";
		};

		led2 {
			label = "pl_led3";
			gpios = <0x09 0x38 0x00>;
			default-state = "on";
		};

		led3 {
			label = "pl_led4";
			gpios = <0x09 0x39 0x00>;
			default-state = "on";
		};

		led4 {
			label = "pl_led5";
			gpios = <0x09 0x3a 0x00>;
			linux,default-trigger = "heartbeat";
		};

		led5 {
			label = "pl_led6";
			gpios = <0x09 0x3b 0x00>;
			linux,default-trigger = "timer";
		};
	};

	fpga-axi@0 {
		compatible = "simple-bus";
		interrupt-parent = <0x04>;
		#address-cells = <0x01>;
		#size-cells = <0x01>;
		ranges;
		phandle = <0x40>;

		i2c@41620000 {
			compatible = "xlnx,axi-iic-1.01.b\0xlnx,xps-iic-2.00.a";
			reg = <0x41620000 0x10000>;
			interrupt-parent = <0x04>;
			interrupts = <0x00 0x37 0x04>;
			clocks = <0x01 0x0f>;
			clock-names = "pclk";
			#size-cells = <0x00>;
			#address-cells = <0x01>;
			phandle = <0x41>;
			clock-frequency = <100000>;
			
			ad7291@2f {
				compatible = "adi,ad7291";
				reg = <0x2f>;
			};

			eeprom@50 {
				compatible = "at24,24c02";
				reg = <0x50>;
			};
		};

		dma@7c400000 {
			compatible = "adi,axi-dmac-1.00.a";
			reg = <0x7c400000 0x10000>;
			#dma-cells = <0x01>;
			interrupts = <0x00 0x39 0x04>;
			clocks = <0x01 0x10>;
			phandle = <0x15>;

			adi,channels {
				#size-cells = <0x00>;
				#address-cells = <0x01>;

				dma-channel@0 {
					reg = <0x00>;
					adi,source-bus-width = <0x40>;
					adi,source-bus-type = <0x02>;
					adi,destination-bus-width = <0x40>;
					adi,destination-bus-type = <0x00>;
				};
			};
		};

		dma@7c420000 {
			compatible = "adi,axi-dmac-1.00.a";
			reg = <0x7c420000 0x10000>;
			#dma-cells = <0x01>;
			interrupts = <0x00 0x38 0x04>;
			clocks = <0x01 0x10>;
			phandle = <0x17>;

			adi,channels {
				#size-cells = <0x00>;
				#address-cells = <0x01>;

				dma-channel@0 {
					reg = <0x00>;
					adi,source-bus-width = <0x40>;
					adi,source-bus-type = <0x00>;
					adi,destination-bus-width = <0x40>;
					adi,destination-bus-type = <0x02>;
				};
			};
		};

		cf-ad9361-lpc@79020000 {
			compatible = "adi,axi-ad9361-6.00.a";
			reg = <0x79020000 0x6000>;
			dmas = <0x15 0x00>;
			dma-names = "rx";
			spibus-connected = <0x16>;
			phandle = <0x42>;
		};

		cf-ad9361-dds-core-lpc@79024000 {
			compatible = "adi,axi-ad9361-dds-6.00.a";
			reg = <0x79024000 0x1000>;
			clocks = <0x16 0x0d>;
			clock-names = "sampl_clk";
			dmas = <0x17 0x00>;
			dma-names = "tx";
			phandle = <0x43>;
		};

		i2c@41600000 {
			compatible = "xlnx,axi-iic-1.01.b\0xlnx,xps-iic-2.00.a";
			reg = <0x41600000 0x10000>;
			interrupt-parent = <0x04>;
			interrupts = <0x00 0x3a 0x04>;
			clocks = <0x01 0x0f>;
			clock-names = "pclk";
			#size-cells = <0x00>;
			#address-cells = <0x01>;
			clock-frequency = <100000>;

			adv7511@39 {
				compatible = "adi,adv7511";
				reg = <0x39>;
				reg-names = "main";
				adi,input-depth = <0x08>;
				adi,input-colorspace = "rgb";
				adi,input-clock = "1x";
				adi,clock-delay = <0x00>;
				phandle = <0x44>;

				ports {
					#address-cells = <0x01>;
					#size-cells = <0x00>;

					port@0 {
						reg = <0x00>;

						endpoint {
							remote-endpoint = <0x18>;
							phandle = <0x1b>;
						};
					};

					port@1 {
						reg = <0x01>;
					};
				};
			};
		};

		dma@43000000 {
			compatible = "adi,axi-dmac-1.00.a";
			reg = <0x43000000 0x10000>;
			#dma-cells = <0x01>;
			interrupts = <0x00 0x3b 0x04>;
			clocks = <0x01 0x10>;
			phandle = <0x19>;

			adi,channels {
				#size-cells = <0x00>;
				#address-cells = <0x01>;

				dma-channel@0 {
					reg = <0x00>;
					adi,source-bus-width = <0x40>;
					adi,source-bus-type = <0x00>;
					adi,destination-bus-width = <0x40>;
					adi,destination-bus-type = <0x01>;
				};
			};
		};

		axi-clkgen@79000000 {
			compatible = "adi,axi-clkgen-2.00.a";
			reg = <0x79000000 0x10000>;
			#clock-cells = <0x00>;
			clocks = <0x01 0x0f 0x01 0x10>;
			clock-names = "s_axi_aclk\0clkin1";
			phandle = <0x1a>;
		};

		axi_hdmi@70e00000 {
			compatible = "adi,axi-hdmi-tx-1.00.a";
			reg = <0x70e00000 0x10000>;
			dmas = <0x19 0x00>;
			dma-names = "video";
			clocks = <0x1a>;
			adi,is-rgb;

			port {

				endpoint {
					remote-endpoint = <0x1b>;
					phandle = <0x18>;
				};
			};
		};

		axi-pwmgen@43c00000 {
			compatible = "adi,axi-pwmgen";
			reg = <0x43c00000 0x10000>;
			#pwm-cells = <0x02>;
			clocks = <0x01 0x0f>;
			phandle = <0x1c>;
		};
	};

	pwm-fan {
		compatible = "pwm-fan";
		status = "okay";
		pwms = <0x1c 0x00 0xc350 0x00>;
		#cooling-cells = <0x02>;
		cooling-levels = <0x00 0x66 0xaa 0xc8>;
		interrupt-parent = <0x09>;
		interrupts = <0x41 0x02>;
		pulses-per-revolution = <0x02>;
	};

	clocks {

		clock@0 {
			compatible = "fixed-clock";
			clock-frequency = <0x2625a00>;
			clock-output-names = "ad9361_ext_refclk";
			#clock-cells = <0x00>;
			phandle = <0x08>;
		};
	};

	__symbols__ {
		cpu0 = "/cpus/cpu@0";
		cpu1 = "/cpus/cpu@1";
		fpga_full = "/fpga-full";
		regulator_vccpint = "/fixedregulator";
		replicator_out_port0 = "/replicator/out-ports/port@0/endpoint";
		replicator_out_port1 = "/replicator/out-ports/port@1/endpoint";
		replicator_in_port0 = "/replicator/in-ports/port/endpoint";
		amba = "/axi";
		adc = "/axi/adc@f8007100";
		can0 = "/axi/can@e0008000";
		can1 = "/axi/can@e0009000";
		gpio0 = "/axi/gpio@e000a000";
		i2c0 = "/axi/i2c@e0004000";
		i2c1 = "/axi/i2c@e0005000";
		intc = "/axi/interrupt-controller@f8f01000";
		L2 = "/axi/cache-controller@f8f02000";
		mc = "/axi/memory-controller@f8006000";
		ocmc = "/axi/ocmc@f800c000";
		uart0 = "/axi/serial@e0000000";
		uart1 = "/axi/serial@e0001000";
		spi0 = "/axi/spi@e0006000";
		adc0_ad9361 = "/axi/spi@e0006000/ad9361-phy@0";
		spi1 = "/axi/spi@e0007000";
		qspi = "/axi/spi@e000d000";
		flash0 = "/axi/spi@e000d000/flash@0";
		smcc = "/axi/memory-controller@e000e000";
		nand0 = "/axi/memory-controller@e000e000/flash@e1000000";
		nor0 = "/axi/memory-controller@e000e000/flash@e2000000";
		gem0 = "/axi/ethernet@e000b000";
		gem1 = "/axi/ethernet@e000c000";
		sdhci0 = "/axi/mmc@e0100000";
		sdhci1 = "/axi/mmc@e0101000";
		slcr = "/axi/slcr@f8000000";
		clkc = "/axi/slcr@f8000000/clkc@100";
		rstc = "/axi/slcr@f8000000/rstc@200";
		pinctrl0 = "/axi/slcr@f8000000/pinctrl@700";
		dmac_s = "/axi/dmac@f8003000";
		devcfg = "/axi/devcfg@f8007000";
		efuse = "/axi/efuse@f800d000";
		global_timer = "/axi/timer@f8f00200";
		ttc0 = "/axi/timer@f8001000";
		ttc1 = "/axi/timer@f8002000";
		scutimer = "/axi/timer@f8f00600";
		usb0 = "/axi/usb@e0002000";
		usb1 = "/axi/usb@e0003000";
		watchdog0 = "/axi/watchdog@f8005000";
		etb_in_port = "/axi/etb@f8801000/in-ports/port/endpoint";
		tpiu_in_port = "/axi/tpiu@f8803000/in-ports/port/endpoint";
		funnel_out_port = "/axi/funnel@f8804000/out-ports/port/endpoint";
		funnel0_in_port0 = "/axi/funnel@f8804000/in-ports/port@0/endpoint";
		funnel0_in_port1 = "/axi/funnel@f8804000/in-ports/port@1/endpoint";
		funnel0_in_port2 = "/axi/funnel@f8804000/in-ports/port@2/endpoint";
		ptm0_out_port = "/axi/ptm@f889c000/out-ports/port/endpoint";
		ptm1_out_port = "/axi/ptm@f889d000/out-ports/port/endpoint";
		fpga_axi = "/fpga-axi@0";
		fmc_i2c = "/fpga-axi@0/i2c@41620000";
		rx_dma = "/fpga-axi@0/dma@7c400000";
		tx_dma = "/fpga-axi@0/dma@7c420000";
		cf_ad9361_adc_core_0 = "/fpga-axi@0/cf-ad9361-lpc@79020000";
		cf_ad9361_dac_core_0 = "/fpga-axi@0/cf-ad9361-dds-core-lpc@79024000";
		adv7511 = "/fpga-axi@0/i2c@41600000/adv7511@39";
		adv7511_in = "/fpga-axi@0/i2c@41600000/adv7511@39/ports/port@0/endpoint";
		hdmi_dma = "/fpga-axi@0/dma@43000000";
		hdmi_clock = "/fpga-axi@0/axi-clkgen@79000000";
		axi_hdmi_out = "/fpga-axi@0/axi_hdmi@70e00000/port/endpoint";
		pwm = "/fpga-axi@0/axi-pwmgen@44b00000";
		ad9361_clkin = "/clocks/clock@0";
	};
};

And here is the vivado block design and reg map.

root@analog:/sys/bus/platform/devices/70e00000.axi_hdmi# ls
dma:video  driver_override  graphics  of_node  subsystem
driver     drm              modalias  power    uevent
root@analog:/sys/bus/platform/devices/70e00000.axi_hdmi# cd dma:video
root@analog:/sys/bus/platform/devices/70e00000.axi_hdmi/dma:video# ls -ll
total 0
-r--r--r-- 1 root root 4096 Aug  5 03:55 bytes_transferred
lrwxrwxrwx 1 root root    0 Aug  5 03:55 device -> ../../../43000000.dma
-r--r--r-- 1 root root 4096 Aug  5 03:55 in_use
-r--r--r-- 1 root root 4096 Aug  5 03:55 memcpy_count
drwxr-xr-x 2 root root    0 Aug  5 03:54 power
lrwxrwxrwx 1 root root    0 Aug  5 03:55 slave -> ../../../70e00000.axi_hdmi
lrwxrwxrwx 1 root root    0 Aug  5 03:53 subsystem -> ../../../../../../class/dma
-rw-r--r-- 1 root root 4096 Aug  5 03:53 uevent                                s
root@analog:/sys/class# tform/devices/70e00000.axi_hdmi/dma:video# cd /sys/class
root@analog:/sys/class#
root@analog:/sys/class#
root@analog:/sys/class# ls -ll
total 0
drwxr-xr-x 2 root root 0 Aug  5 03:53 arvo
drwxr-xr-x 2 root root 0 Aug  5 03:53 backlight
drwxr-xr-x 2 root root 0 Aug  5 03:53 bdi
drwxr-xr-x 2 root root 0 Aug  5 03:53 block
drwxr-xr-x 2 root root 0 Aug  5 03:53 devlink
drwxr-xr-x 2 root root 0 Aug  5 03:53 dma
drwxr-xr-x 2 root root 0 Aug  5 03:53 drm
drwxr-xr-x 2 root root 0 Aug  5 03:53 dvb
drwxr-xr-x 2 root root 0 Aug  5 03:53 extcon
drwxr-xr-x 2 root root 0 Aug  5 03:53 fpga_bridge
drwxr-xr-x 2 root root 0 Aug  5 03:53 fpga_manager
drwxr-xr-x 2 root root 0 Aug  5 03:53 fpga_region
drwxrwxr-x 2 root gpio 0 Aug  5 03:54 gpio
drwxr-xr-x 2 root root 0 Aug  5 03:53 graphics
drwxr-xr-x 2 root root 0 Aug  5 03:53 hidraw
drwxr-xr-x 2 root root 0 Aug  5 03:53 hwmon
drwxr-xr-x 2 root root 0 Aug  5 03:53 i2c-adapter
drwxr-xr-x 2 root root 0 Aug  5 03:53 i2c-dev
drwxr-xr-x 2 root root 0 Aug  5 03:53 ieee802154
drwxr-xr-x 2 root root 0 Aug  5 03:53 input
drwxr-xr-x 2 root root 0 Aug  5 03:53 isku
drwxr-xr-x 2 root root 0 Aug  5 03:53 kone
drwxr-xr-x 2 root root 0 Aug  5 03:53 koneplus
drwxr-xr-x 2 root root 0 Aug  5 03:53 konepure
drwxr-xr-x 2 root root 0 Aug  5 03:53 kovaplus
drwxr-xr-x 2 root root 0 Aug  5 03:53 leds
drwxr-xr-x 2 root root 0 Aug  5 03:53 mathworks_ip
drwxr-xr-x 2 root root 0 Aug  5 03:53 mdio_bus
drwxr-xr-x 2 root root 0 Aug  5 03:53 mem
drwxr-xr-x 2 root root 0 Mar 27 06:42 misc
drwxr-xr-x 2 root root 0 Aug  5 03:53 mmc_host
drwxr-xr-x 2 root root 0 Aug  5 03:53 mtd
drwxr-xr-x 2 root root 0 Aug  5 03:53 mux
drwxr-xr-x 2 root root 0 Aug  5 03:53 net
drwxr-xr-x 2 root root 0 Aug  5 03:53 power_supply
drwxr-xr-x 2 root root 0 Aug  5 03:53 pwm
drwxr-xr-x 2 root root 0 Aug  5 03:53 pyra
drwxr-xr-x 2 root root 0 Aug  5 03:53 regulator
drwxr-xr-x 2 root root 0 Aug  5 03:53 rtc
drwxr-xr-x 2 root root 0 Aug  5 03:53 ryos
drwxr-xr-x 2 root root 0 Aug  5 03:53 savu
drwxr-xr-x 2 root root 0 Aug  5 03:53 scsi_device
drwxr-xr-x 2 root root 0 Aug  5 03:53 scsi_disk
drwxr-xr-x 2 root root 0 Aug  5 03:53 scsi_generic
drwxr-xr-x 2 root root 0 Aug  5 03:53 scsi_host
drwxr-xr-x 2 root root 0 Aug  5 03:53 sound
drwxr-xr-x 2 root root 0 Aug  5 03:53 spidev
drwxr-xr-x 2 root root 0 Aug  5 03:53 spi_master
drwxr-xr-x 2 root root 0 Aug  5 03:53 thermal
drwxr-xr-x 2 root root 0 Mar 27 06:42 tty
drwxr-xr-x 2 root root 0 Aug  5 03:53 typec
drwxr-xr-x 2 root root 0 Aug  5 03:53 typec_mux
drwxr-xr-x 2 root root 0 Aug  5 03:53 udc
drwxr-xr-x 2 root root 0 Aug  5 03:53 uio
drwxr-xr-x 2 root root 0 Aug  5 03:53 usb_role
drwxr-xr-x 2 root root 0 Aug  5 03:53 vc
drwxr-xr-x 2 root root 0 Aug  5 03:53 video4linux
drwxr-xr-x 2 root root 0 Aug  5 03:53 vtconsole
drwxr-xr-x 2 root root 0 Aug  5 03:53 wakeup
drwxr-xr-x 2 root root 0 Aug  5 03:53 watchdog
root@analog:/sys/class# cd dma
root@analog:/sys/class/dma# ls
dma0chan0  dma2chan0  dma3chan1  dma3chan3  dma3chan5  dma3chan7
dma1chan0  dma3chan0  dma3chan2  dma3chan4  dma3chan6
root@analog:/sys/class/dma# cd dma2chan0
root@analog:/sys/class/dma/dma2chan0# ls
bytes_transferred  in_use        power  subsystem
device             memcpy_count  slave  uevent
root@analog:/sys/class/dma/dma2chan0# cat in_use
1
root@analog:/sys/class/dma/dma2chan0# ll
-bash: ll: command not found
root@analog:/sys/class/dma/dma2chan0# ls
bytes_transferred  in_use        power  subsystem
device             memcpy_count  slave  uevent
root@analog:/sys/class/dma/dma2chan0# cat slave
cat: slave: Is a directory
root@analog:/sys/class/dma/dma2chan0# ll
-bash: ll: command not found
root@analog:/sys/class/dma/dma2chan0# ls -ll
total 0
-r--r--r-- 1 root root 4096 Aug  5 03:55 bytes_transferred
lrwxrwxrwx 1 root root    0 Aug  5 03:55 device -> ../../../43000000.dma
-r--r--r-- 1 root root 4096 Aug  5 03:55 in_use
-r--r--r-- 1 root root 4096 Aug  5 03:55 memcpy_count
drwxr-xr-x 2 root root    0 Aug  5 03:54 power
lrwxrwxrwx 1 root root    0 Aug  5 03:55 slave -> ../../../70e00000.axi_hdmi
lrwxrwxrwx 1 root root    0 Aug  5 03:53 subsystem -> ../../../../../../class/dma
-rw-r--r-- 1 root root 4096 Aug  5 03:53 uevent
root@analog:/sys/class/dma/dma2chan0# cat bytes_transferred
0
root@analog:/sys/class/dma/dma2chan0# cat memcpy_count
0
root@analog:/sys/class/dma/dma2chan0# cd /sys/class/graphics/fb0/
root@analog:/sys/class/graphics/fb0# ls -ll
total 0
-rw-r--r-- 1 root root 4096 Aug  5 03:59 bits_per_pixel
-rw-r--r-- 1 root root 4096 Aug  5 03:59 blank
-rw-r--r-- 1 root root 4096 Aug  5 03:59 bl_curve
-rw-r--r-- 1 root root 4096 Aug  5 03:59 console
-rw-r--r-- 1 root root 4096 Aug  5 03:59 cursor
-r--r--r-- 1 root root 4096 Aug  5 03:59 dev
lrwxrwxrwx 1 root root    0 Aug  5 03:59 device -> ../../../70e00000.axi_hdmi
-rw-r--r-- 1 root root 4096 Aug  5 03:59 mode
-rw-r--r-- 1 root root 4096 Aug  5 03:59 modes
-r--r--r-- 1 root root 4096 Aug  5 03:54 name
-rw-r--r-- 1 root root 4096 Aug  5 03:59 pan
drwxr-xr-x 2 root root    0 Aug  5 03:54 power
-rw-r--r-- 1 root root 4096 Aug  5 03:59 rotate
-rw-r--r-- 1 root root 4096 Aug  5 03:59 state
-r--r--r-- 1 root root 4096 Aug  5 03:59 stride
lrwxrwxrwx 1 root root    0 Aug  5 03:53 subsystem -> ../../../../../../class/graphics
-rw-r--r-- 1 root root 4096 Aug  5 03:53 uevent
-rw-r--r-- 1 root root 4096 Aug  5 03:59 virtual_size