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ADRV9364-Z7020 internal delays

Category: Software
Product Number: adrv9364-z7020

we are using ADRV9364-Z7020 board, and want to implment a "delay line" element.

we use the supplied design and connect the TX and RX ports of the AXI-AD9361 directly to each other.
when testing the total delay between RX and TX RF ports we get ~1usec, which is too high for nominal "zero delay" we want in this case.

how can we minimize the delay of this datapath? 

here are some details:

* we don't use the TX and RX DMAs.  We are trying to make a loop from rx_data to tx_data with some our logic between them.

* If we try to connect the axi_ad9361 ip's ADC0 output to DAC0 input in the block design of the reference design we get about 1us delay on this path. Delay measured from RF in to RF out of the ad9361 chip.

* Unfortunately when I tried to open the axi_ad9631 ip for edit and use the DDR buffer outputs / inputs It didn't work because of Repackage of the IP - all generics and configuration of the IP went crazy.

* Also, I tried to do it outside of the axi_ad9361 but it will not work the the internal buffers inside of the IP. We need the axi_ad9361 only for SPI configuration of the chip.

* I have used the matlab filter wizard, connected it to our board, and got the current configuration of clocks and filters.

also, more calulations based on UG-570

the configuration we're using doesn't include the FIR filter (I'll explain how I know that later***) and does include the three HB filters:

From the iio_info utility I got:

rx_path_rates value: BBPLL:983040000 ADC:491520000 R2:245760000 R1:122880000 RF:61440000 RXSAMP:61440000
tx_path_rates value: BBPLL:983040000 DAC:245760000 T2:122880000 T1:61440000 TF:61440000 TXSAMP:61440000

Now, I don't know how many coefficients are used for the HB1/2/3, but let's say the maximum number is used for each one of them on both sides RX and TX.

Having said that, and according to the delay equation from page 34 @ UG-570, we get the following delay values:

dtau_RX = (16/2)(1/245.76e6) + (6/2)(1/122.88e6) + (14/2)*(1/61.44e6) = 0.17usec
dtau_TX = (14/2)(1/61.44e6) + (6/2)(1/122.88e6) + (28/2)*(1/245.76e6) = 0.19usec

dtau_total = 0.36usec

But still, as I mentioned before, when I checked what is the delay between the RX RF port and the TX RF port I got a larger delay value > 1us.

* How do I know if the FIR is bypassed -
1) I used iio_info and got: filter_fir_en value: 0
2) I compiled a program using the ad9361 library and called the following API: ad9361_get_trx_fir_enable(ad9361-phy, &en) and got en = 0.

* I don't know how many coefficients are used for the HB1/2/3 - How can I check this?



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