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GPIO connection with any external I/O pins for ADRV1CRR FMC Carrier Board

Category: Hardware
Product Number: ad9361-z7035, ad9361


I'm working on ADRV9361-Z7035 using PicoZed SDR FMC Carrier Card. I have built my RTL core inside the "axi_ad9361.v". I was successfully able to get some RTL check points connected out to the GPIO pins available at the BOB board pad area P2 or P13, and check those signals on the oscilloscope, based on your valuable response on following thread

Internal GPIO connection to any pins of P2 or P13 for ADRV9361-Z7035 BOB Carrier Board - Q&A - FPGA Reference Designs - EngineerZone (

Currently, I'm working with the bigger ADRV1CRR FMC carrier board and I need to be able to get some RTL design points out, Could you please help me on how do so?


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