GPIO connection with any external I/O pins for ADRV1CRR FMC Carrier Board

Question

Hi, 
 I'm working on ADRV9361-Z7035 using PicoZed SDR FMC Carrier Card. I have built my RTL core inside the "axi_ad9361.v". I was successfully able to get some RTL check points connected out to the GPIO pins available at the BOB board pad area P2 or P13, and check those signals on the oscilloscope, based on your valuable response on following thread 
 Internal GPIO connection to any pins of P2 or P13 for ADRV9361-Z7035 BOB Carrier Board - Q&A - FPGA Reference Designs - EngineerZone (analog.com) 
 Currently, I'm working with the bigger ADRV1CRR FMC carrier board and I need to be able to get some RTL design points out, Could you please help me on how do so? 
 Thanks, Hatem

iulia · Accepted Answer

Hi, 
 Sorry for the late reply. 
 Hatem said: I was wondering If this option is also available via the ADRV1CRR-FMC carrier 
 Yes, it should be. 
 Hatem said: the question was what are tcl files should I update to do such connection on project building 
 This is a broad subject, but I'll try to say it as shortly as possible: Tcl is a scripting language and it is integrated in the Xilinx tool env. We use it also because we want to have as little interaction as possible with the GUI, to make things faster, and to be able to track the changes done in each project. All in all, to quote Xilinx, "it is a standard language in the semiconductor industry". If you want to know more about this, please go through their documentation. 
 Hatem said: I've one more question related to passing long input variables via python script into the ARM cortex A9 processor 
 With this, I am sorry but I do not have the knowledge to help you. You should ask in the Linux Software Drivers forum. 
 Best regards, Iulia)

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GPIO connection with any external I/O pins for ADRV1CRR FMC Carrier Board