How to use AD9361 to comlete OFDM data transmit?

Hi,

Can you create a diagram and post it here? I don't understand the setup you are trying to achieve.

Andrei

DOCX
I have uploaded the diagram. I have designed the FPGA code for OFDM data transmission.

I have a three-step plan to achieve my goal. The first step involves using two FPGA boards connected directly through a 12-bit data line to facilitate data transmission. This step has been achieved. The second step includes attaching a DA (Digital-to-Analog) converter to the two FPGA boards to convert the digital signal into an analog signal, and then using an AD (Analog-to-Digital) converter to revert the signal back to digital for data transmission. The third step involves converting the digital signal to an analog signal using a DA converter, then transmitting an 800 MHz wireless signal via an AD9361 module. Finally, a second AD9361 module will receive this wireless signal to complete the data transmission.

I want to use AD9361 to achieve this for steps 2 and 3.

So now I mainly have 2 questions:

1. How to configure AD-FMCOMMS3 via the fmc connector of cyclone 10 gx development kit board.

2. How to set the 12-bit digital data to fmc connector of AD-FMCOMMS3. Is TX_D0_P~TX_D5_P and TX_D0_N ~TX_D5_N the input 12-bit digital data for DAC convertor and output @TX1A?

Does FPGA need a Hardware or software microprocessor?

Hi,

Sorry for the delayed reply!
I think I understand your goals.

We provide a digital interface(axi_ad9361) as a HDL core that is used to interface with the AD9361.
https://github.com/analogdevicesinc/hdl/tree/main/library/axi_ad9361

You will need to create an HDL design for fmcomms2/3/4, This should not be that hard using the current examples.
Start from https://wiki.analog.com/resources/fpga/docs/hdl/porting_project_quick_start_guide

choushochu said:

Does FPGA need a Hardware or software microprocessor?

Yes, the AD9361 must be programmed via SPI when the system is powered-on initialized.

We previously had some bad experience porting the fmcomms2/3/4 on arria10 boards because of how the FPGA pins where routed the the FMC port.
Clock capable pins not at the expected locations or pins of a  interface spread across multiple banks.

Here is an example for 10soc. which can't be used with newer version of Quartus tools 
 https://github.com/analogdevicesinc/hdl/tree/fmcomms2_a10soc_bring_back

There is an example for this design created by someone on Ez. if you search for it.

Andrei 

Hi, thank you for your detailed reply. I want to use Verilog code to control AD-9361 via SPI directly, So is there any SPI timing diagram or detailed material about AD-9361 SPI?

https://www.analog.com/media/en/technical-documentation/user-guides/ad9361.pdf

Andrei

Hi choushochu ,

Do you have any updates? Can this thread be closed?

Best regards,
Iulia