Problems about adrv9009_zc706 project schematic

Question

When I tried to study the schematic of adrv9009_zc706,I found there had some units haven't connected to the top design like below photo.I wonder it is working or not?What is their function? 
 
 Looking forward to your reply. 
 
 Regards, 
 Lcy

iulia · Accepted Answer

Hi, 
 It is no problem to have them like that. They are not doing anything, they are just brought there in case other designs need them. 
 In this design, ref_clk1_p/n and tx_sync_0_p/n are used, because that's what fits this FPGA. In other systems, it might be that the FMC pin where ref_clk1_p/n is connected, is not a clock capable pin, so you need to take another one and you have the option for ref_clk0_p/n, which is the same thing. 
 Best regards, Iulia)

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Problems about adrv9009_zc706 project schematic