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Failed build of axi_jesd204_tx while generating HDL reference design for ADRV0926 (ZCU102)

Thread Summary

The user encountered an error 'Failed to load feature 'ipservices'' while building the axi_jesd204_tx IP from the ADRV9026 ZCU102 repository. The issue was resolved after updating the Xilinx license file, confirming that the problem was related to licensing. The user also followed a suggested build process using Vivado's GUI and the adi_make.tcl script, which helped ensure the environment was correctly set up.
AI Generated Content
Category: Software
Product Number: ADRV9026
Software Version: Vivado/Vitis 2023.2; Windows 11 (64-bit); Cygwin

Dear all,

I tried to build and generate a hardware file (.xsa) based on this repository (https://github.com/analogdevicesinc/hdl/tree/main/projects/adrv9026/zcu102), but I got the following error while trying to build axi_jesd204_tx which was indicated in axi_jesd204_tx_ip.log: ERROR: [Common 17-217] Failed to load feature 'ipservices'.

I have been following this guide for building the HDL:

(https://wiki.analog.com/resources/fpga/docs/build?rev=1683209213).

I would appreciate any help for solving this issue.

Best regards,