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Trying to implement jesd204b protocol between ADRV9009 and ZC706 using TCL files provided by EngineerZone.

Category: Software
Product Number: ADRV9009
Software Version: Vivado2019.1


I have downloaded the TCL files from GITHUB available in the following link for building sample vivado example project for ADRV9009 ON ZC706

Releases · analogdevicesinc/hdl (

Tools used:

1.Vivado 2019.1

2.Tried in both windows and Linux environment.

Trying to implement but couldn't figure out what is the issue. These are some issues that are showing up and block design could not be generated.

Any procedure for building the block design will be helpful

P.S: We have assigned source paths wherever it is required.

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