hdl instance always in reset

Hi,

Just letting you know we saw your questions and will come back with a reply on Monday, sorry for the delay.

Until then, could you post the full log from Linux? If you run "dmesg".

Best regards,
Iulia

Hi
The only reference of AD part is :

[    2.309014] ad9361 spi1.0: ad9361_probe : enter (ad9361)
[    2.543959] ad9361 spi1.0: ad9361_probe : AD936x Rev 0 successfully initialized
[    2.551492] ad9361 spi1.2: ad9361_probe : enter (ad9361)
[    2.783167] ad9361 spi1.2: ad9361_probe : AD936x Rev 0 successfully initialized

In this first design, only axi_AD9361_v1_0 hdl components are implemented.

I will try to generate a new bloc design that includes dma for rx and tx for only one AD9364.

Best regards

Fred

Hi Fred,

F337 said:

As it is a custom design, we want to avoid implementing adi dmas, fifos used for adc and dac to optimize resources..

The DMAs and fifos are there for optimisation. DMA as few resources, and fifo for clock speed/data throughput. If you don't need them you can remove them.

F337 said:

There is also sysid/sysid_ROM which I don't understand how it should be implemented.

The sysid is a core that helps us debug systems, It contains info at build time, like git hash and dates. You can remove it.

From the behaviour I would check if the reset going to the AD9364 that is not probing is properly connected. Than, going to the SPI lines check the same thing and see in the Linux driver what does the SPI read from the ID register of AD9364. There is a check of the ID in the probe function of the driver.

Andrei

Hi Andrei,

We are investigating the DeviceTree, as we have done lots of copy/paste. We use a standard linux kernel (not petalinux), so we have to check/clean DeviceTree and adapt driver if needed.
We will remove sysid core and DMAs, as you said they are not mandatory.

If we keep only axi_AD9361 ip, do we still have access to Tx delay line calibration?

Fred

You can set it from a parameter an also properly constraint the tx path. I think the delay calibration is done in software at AD9361 device level.

Andrei

Hi F337 ,

Do you have any updates?

Best regards,
Iulia

Hi lulia,
we have solved our issue by cleaning the Device Tree and also by setting our 2 AD9364 in 'MASTER'mode (id in HDL= 0)

Thanks