Sampling rate of AD9081

Hi Waqas_Rehman,

You can see the supported modes for the AD9081 in the following user guide: https://www.analog.com/media/en/technical-documentation/user-guides/ad9081-ad9082-ug-1578.pdf (starting from page 94). There is also example "Example 5: 4D2A Single Band, DAC in 1 GSPS I/Q Mode, ADC in 1 GSPS I/Q Mode" at page 239. 

Please note that you will need to modify the JESD parameters & clocks in the devicetree, the JESD parameters inside the system_project.tcl file and (possibly) the timing_constr.xdc file with your clock values before building the HDL.

Regards,

Bogdan

Hi Waqas_Rehman,

You can see the supported modes for the AD9081 in the following user guide: https://www.analog.com/media/en/technical-documentation/user-guides/ad9081-ad9082-ug-1578.pdf (starting from page 94). There is also example "Example 5: 4D2A Single Band, DAC in 1 GSPS I/Q Mode, ADC in 1 GSPS I/Q Mode" at page 239. 

Please note that you will need to modify the JESD parameters & clocks in the devicetree, the JESD parameters inside the system_project.tcl file and (possibly) the timing_constr.xdc file with your clock values before building the HDL.

Regards,

Bogdan