Out of Context Synthesis Explanation

Hi,

We noticed this issue too. Currently we don't have a fix for it, but we're working on it.

Now I don't have an estimate, but when we fix it for sure there will be a PR with this, so stay tuned.

Best regards,
Iulia

We started to use OOC option starting with 2021.1 Vivado version, if I recall correctly. From this version, Vivado is doing some unpredictable optimizations in design, during synthesis stage, so timing constraints may not apply properly. In the OOC flow, certain levels of hierarchy are synthesized separately from the top-level. The components are synthesized first then the top-level synthesis is run, and each component is treated as a black box. Since the signals are not optimized at this phase, timing constrains are applied fine.

Whenever we are switching to a newer version of compilation tools, we are also checking how projects would build without OOC. 

You can read more about OOC here: https://docs.xilinx.com/r/en-US/ug949-vivado-design-methodology/Out-of-Context-Synthesis

Thanks,

Stefan

Hi-

I did a little more digging into the issue and it has to do with how the constraints are being applied.

When you set the mode to OOC off the data path delays for clock crossing are not showing up the same way when you have OOC enabled.

Joe